mcinerny@rochester.ARPA (Michael McInerny) (06/09/87)
[sorry, no program today!] I just got an MC68020 for my birthday and I'd really like to put it in my Amiga. Unfortunately, the designers of the 1000 forgot to put in a PGA socket :-) So, what I'd like to know is where I can get a 68020-->68000 adapter cheap, or a 68020+32bit memory (& maybe 2x speed) for not as cheap, but still not expensive. Doesn't have to be internal, although that'd be preferable. I've already called CSA and they wanted about $400 for the board and PALs (ready for the '20 and an '881 [in my dreams :]). That's too rich for my blood. Spectra markets a clip on board for the Mac market, but they said they couldn't beat the $400 price. I was hoping for about $150 (am I crazy?). Even schemas would be fine. -Michael P.S. Fred, maybe Moto has an Application Note?
dillon@CORY.BERKELEY.EDU (Matt Dillon) (06/10/87)
Well, you could make an adapter board yourself without all the fancy stuff, etc.... Here is the core level signal conversions required to replace a 68010 with a 68020, and it shouldn't be too different to do it with a 68000. This description is FAR from complete, but should give you hardware hackers the start you need to do the interface yourself. Note that the performance boost will not be all that much, although more than a 68010. It would be interesting to interface a 25 Mhz 68020 to the Amiga (since the bus is asyncronous). -Matt 68010 68020 socket processor CLK CLK Vcc Vcc Gnd Gnd ^Reset ^Reset ^Berr ^Berr ^Halt ^Halt ^Br ^Br ^Bg ^Bg ^Bgack ^Bgack ^IPL2 ^IPL2 ^IPL1 ^IPL1 ^IPL0 ^IPL0 ^IPEND N.C. ^ECS N.C. ^OCS N.C. ^BREN N.C. ^VPA ^AVEC E N.C. VMA N.C. FC0 FC0 FC1 FC1 FC2 FC2 AD24-31 N.C. AD23-1 AD23-1 R/^W R/^W D15-0 D31-16 D15-0 N.C. ^DTACK ^DSACK1 ^DSACK0 +5 ^CDIS +5 SIZ1 (Note A) SIZ0 (Note A) A0 (Note A) ^DS (Note A) ^AS (Note B) ^RMC (Note B) NOTE A: A0 and ^DS on the 68020 side are OR'd together to create ^UDS on the 68010 side SIZ1, SIZ0, and A0 go into a three input NAND gate with SIZ1 and A0 inverted beforehand. The output of the NAND gate becomes the input to another OR gate. The other input to this OR gate is ^DS (all this on the 68020 side). The OUTPUT of the OR gate is the ^LDS signal on the 68010 side. NOTE B: ^AS and ^RMC are OR'd together to create ^AS on the 68010 side (Taken from some obscure magazine article dated June 20, 1985). -Matt
aburto@marlin.UUCP (Alfred A. Aburto) (06/10/87)
Distribution:comp.sys.amiga In article <28386@rochester.ARPA> mcinerny@rochester.UUCP (Michael McInerny) writes: >to put in a PGA socket :-) >I've already called CSA and they wanted about $400 for the board and >PALs (ready for the '20 and an '881 [in my dreams :]). That's too >rich for my blood. Spectra markets a clip on board for the Mac >market, but they said they couldn't beat the $400 price. I was >hoping for about $150 (am I crazy?). Even schemas would be fine. > >-Michael > $150 for a blank PC board is not unreasonable. For some reason all 68020/68881 hardware seems to be *very* expensive and I don't understand why it should be. Single CPU 68020/68881 PC BOARDS seem to run in the $1k-$2k region. A number of people have put 68020/68881's in their Amiga's (Myself included) but they paid approximately $1k for this enhancement. Alot bucks for what looks like relatively simple hardware ---- 68020, 68881, and a couple of PALS. Check out EDN magazine 1985 and 1986. There were a number of articles published by Motorola (with schematics) showing how to interface or adapt the 68020 to a 68000 system. Sorry but I don't have these references handy right now. Al Aburto
stever@videovax.UUCP (06/10/87)
In article <8706100022.AA07667@cory.Berkeley.EDU>, Matt Dillon (dillon@CORY.BERKELEY.EDU) quotes an article describing how to substitute a 68020 for a 68000 or 68010: > . . . > 68010 68020 > socket processor > . . . > SIZ1 (Note A) > SIZ0 (Note A) > A0 (Note A) > ^DS (Note A) > ^AS (Note B) > ^RMC (Note B) > > > NOTE A: > A0 and ^DS on the 68020 side are OR'd together to create ^UDS on > the 68010 side > > SIZ1, SIZ0, and A0 go into a three input NAND gate with SIZ1 and A0 > inverted beforehand. The output of the NAND gate becomes the input > to another OR gate. The other input to this OR gate is ^DS (all this > on the 68020 side). The OUTPUT of the OR gate is the ^LDS signal on > the 68010 side. This encoding for ^LDS will fail in many strange and wonderful ways! To appreciate the full potential for disaster, get a copy of the _MC68020 32-Bit Microprocessor User's Manual_ from Motorola, and look at Table 5-3, entitled "MC68020 Internal to External Data Bus Multiplexor" (found on page 5-5 of the second edition). What is required is a circuit that matches the description: ^LDS will be low when ^DS is low and either (1) A0 is high, or (2) the access is not a byte access. In gates, SIZ0 becomes one input of a two-input NAND gate. Invert SIZ1 and it becomes the other input of the two-input NAND. The output of the NAND gate will be low for a byte access (SIZ1 = 0; SIZ0 = 1) and high for all other accesses. Let's call the output ^BYTE ("not byte"). Take ^BYTE and A0 into the inputs of a two-input NOR gate. The output of the NOR gate will be low when either ^BYTE is high or A0 is high. We'll call this output ^LOWER. Take ^LOWER and ^DS into the inputs of a two-input OR gate. The output is ^LDS. This will work for all cases, including 3-byte accesses (No, I'm not kidding! What do you think happens when you do a long-word access to an odd boundary? No, it doesn't take an address exception! Look it up!!). Of course, all of this can be done in a PAL. However you do it, be sure that propagation delays don't cause ^UDS and ^LDS (particularly ^LDS) to come out too late in the cycle. > NOTE B: > ^AS and ^RMC are OR'd together to create ^AS on the 68010 side First of all, this won't work! ^RMC is high except during Read-Modify- Write cycles, so the output of the OR gate would _never_ go low (the processor wouldn't get past the initial Reset vector load). If ^AS and ^RMC were AND-ed together, it might seem to be working, but it wouldn't be a good idea! Unlike the 68000 and 68010, when the 68020 runs Read-Modify-Write cycles, it actually is performing several distinct bus accesses. Holding ^AS down during the time when addresses are changing could be hazardous to your mental health!!! Probably the best way to do this would be to hack an ^RMC line in all over your system [ 8^) ]. Failing that, just ignore ^RMC. The likelihood of another system element (e.g., a DMA device) interfering during the execution of a TAS, CAS, or CAS2 instruction is *far* smaller than the probability of a disaster caused by changing the addresses with ^AS asserted and R/^W low!!! As an aside -- if you are *sure* that it is impossible to initiate a write to *any* memory or other device which you use now or might use in the future, then AND-ing ^AS and ^RMC together may be reasonable. This requires that ^DS be an input everywhere there is a possibility of writing to the part. It also requires that accesses to dynamic RAM can be started by ^DS going low (most designs kick off an access when ^AS goes low). If *all* these conditions are met, it is possible to AND ^AS and ^RMC together. But be *very sure*!!! > (Taken from some obscure magazine article dated June 20, 1985). It deserves to remain obscure! Steve Rice ----------------------------------------------------------------------------- Copyright 1987 by Steven E. Rice, P.E. All Rights Reserved. This material may be redistributed only where such redistribution is without charge and without restrictions on further redistribution. Incorporation of this material in a compilation or other collective work constitutes permission from the intermediary to all recipients to freely redistribute the entire collection. All other uses are prohibited. ----------------------------------------------------------------------------- new: stever@videovax.tv.Tek.com old: {decvax | hplabs | ihnp4 | uw-beaver | cae780}!tektronix!videovax!stever
stergios@rocky.STANFORD.EDU (Stergios Marinopoul) (06/10/87)
In article <28386@rochester.ARPA> mcinerny@rochester.UUCP (Michael McInerny) writes: > >So, what I'd like to know is where I can get a 68020-->68000 adapter >cheap, or a 68020+32bit memory (& maybe 2x speed) for not as cheap, >but still not expensive. Doesn't have to be internal, although >that'd be preferable. Look in one of the Jan 1986 issues of EDN (Electronic Design News) They have the schems for making a 000 -=> 020 converter board that plugs into a 68000 socket. In the schems, the six extra signals are generated that normally are not on the 020, but that you better have for the amiga due to some of the 6800 style peripherals. used. stergios marinopoulos S&M Engineering -- % UUCP: !decwrl!rocky.stanford.edu!stergios % % ARPA: f.flex@othello.stanford.edu % % USnail: Crothers Memorial #690, Stanford, CA. 94305 % % Pa Bell: (415) 326-9051 %
dillon@CORY.BERKELEY.EDU.UUCP (06/11/87)
:(dillon@CORY.BERKELEY.EDU) quotes an article describing how to substitute :a 68020 for a 68000 or 68010: : :> . . . : :This encoding for ^LDS will fail in many strange and wonderful ways! To :appreciate the full potential for disaster, get a copy of the _MC68020 : :> NOTE B: :> ^AS and ^RMC are OR'd together to create ^AS on the 68010 side : :First of all, this won't work! ^RMC is high except during Read-Modify- :Write cycles, so the output of the OR gate would _never_ go low (the :processor wouldn't get past the initial Reset vector load). (:=news defeator) I simply copied the signal description from EDN, June 20, 1985. I double checked the items you cited and did not make a mistake. Therefore, assuming your arguments are correct, the article was in error. -Matt
grr@cbmvax.cbm.UUCP (George Robbins) (06/11/87)
In article <8706110517.AA27932@cory.Berkeley.EDU> dillon@CORY.BERKELEY.EDU (Matt Dillon) writes: > :(dillon@CORY.BERKELEY.EDU) quotes an article describing how to substitute > :a 68020 for a 68000 or 68010: > > I simply copied the signal description from EDN, June 20, 1985. > I double checked the items you cited and did not make a mistake. Therefore, > assuming your arguments are correct, the article was in error. There is a Motrola applications note that describes how to do this in some detail, including the PAL equations. Contact a technical person at your local Motorola office for a copy. As long as you are running synchronous (i.e. 7 MHz) to the Amiga, everything is fairly simple. Go faster and life becomes complex. -- George Robbins - now working for, uucp: {ihnp4|seismo|rutgers}!cbmvax!grr but no way officially representing arpa: cbmvax!grr@seismo.css.GOV Commodore, Engineering Department fone: 215-431-9255 (only by moonlite)
FETPC19@CALSTATE.BITNET (06/12/87)
From: FETPC19%CALSTATE.BITNET@wiscvm.wisc.edu [ this line for rent ] In article <28386@rochester.ARPA> stergios@rocky.UUCP (Stergios Marinopoul) writ > Look in one of the Jan 1986 issues of EDN (Electronic Design News) They have > the schems for making a 000 -=> 020 converter board that plugs into > a 68000 socket.... To be more specific, the article is on pages 216-218 of the January 9, 1985 issue of EDN. Has anyone built this converter? If you have, please speak up. It seems to me that there are a few loose ends in the design that might present a trial and error situation for the non-hardware type (like myself :-). For example, the amount of capacitance (C1 - C8) in the circuit is obviously system specific. It should be fairly inexpensive and easy to build this thing, once all of the Amiga specific problems are identified (HELP!!!). Most of the parts are readily available, except for the 68020 and the PGA socket, perhaps. -brian warkentine FETPC19%CALSTATE.BITNET@WISCVM.WISC.EDU or ...ucbvax!ucdavis!csufres!brian