ebr@io.UUCP (07/07/87)
I've been looking at the signetics Intelligent Multiple Disk Controller
(imdc - 68454) and thinking about building a hard-disk interface
for my amiga. The real question, however, is whether or not the
imdc's dma will work in the amiga environment.
The expansion spec tends to be a bit vague on some of the signal
timings and I was wondering if anyone had any comments/advice about
hooking up dma masters.
Can the amiga cope with a dma master is running asynchronously to
the 68000 clock?
All comments and help are gladly accepted.
--
There's sparks a comin' outa' my head!!!
...!harvard!umb!ileaf!ebr Evan B. Ross, Interleaf, Cambridge, Ma
...!sun!sunne!ileaf!ebr (617)577-9813 x5570jdow@pnet02.CTS.COM (Joanne Dow) (07/12/87)
Well, here are a couple suggestions based on what I have been reading in the
amiga.dev conference on bix... First either have a modest sided FIFO for the
disk port to write to and the DMA to read from and write to memory. Otherwise
you can get into deep bandini transferring into CHIP ram when running
640x400x4. Another alternative is tell the machine you need a modest sized
allocation in the device memory. Then get a decent sized byte wide static ram
to place in there. Have the DMA's to CHIP go there instead and then copy to
CHIP with the CPU. Then there wil be NO bus contention at all.
(I understand that there are no problems particular to the Amiga in DMAing to
FAST ram.)
<@_@>
jdow@bix
UUCP: {cbosgd, hplabs!hp-sdd, ihnp4}!crash!gryphon!pnet02!jdow
INET: jdow@pnet02.CTS.COMminer@dino.cpe.ulowell.edu (Rich Miner) (07/13/87)
In article <941@gryphon.CTS.COM> jdow@pnet02.CTS.COM (Joanne Dow) writes: >Otherwise you can get into deep bandini transferring [using DMA] into >CHIP ram when running 640x400x4. We have a +20MIPS graphics coprocessor sitting on the A2000 bus doing DMA access to bitmaps in CHIP RAM. It performs image rotations, edge enhancement etc using DMA to get the images in and out of our coprocessor, including when working with 640x400x4. Sure we get a few less bus cycles, but there is enough bandwidth to perform DMA image manipulation and still have it look nice. See ya at SIGGRAPH :-)
daveh@cbmvax.UUCP (Dave Haynie) (07/15/87)
in article <941@gryphon.CTS.COM>, jdow@pnet02.CTS.COM (Joanne Dow) says: > > Have the DMA's to CHIP go there instead and then copy to > CHIP with the CPU. Then there wil be NO bus contention at all. > (I understand that there are no problems particular to the Amiga in DMAing to > FAST ram.) > <@_@> > jdow@bix > You still have a potential problem with DMA latency when talking to FAST RAM. If the 68000 is in the process of talking with CHIP RAM when your DMA controller wants the bus, there can be a wait. Assume that the DMA request come in around the first cycle of the horizontal scan of a 640x400x4 screen, while the 68000 is in the process of reading CHIP RAM. The 68000 will give your DMA device a bus grant in return for it's request. But you can't issue a /BGACK and start the transfer until the end of the cycle. Since the custom chips keep the 68000 off the chip bus by wait stating it, that cycle won't end until horizontal retrace. At that point, the DMA device get the bus, and can DMA to its heart's content. This is certainly not a bad a case as trying to DMA to chip memory in the same senario, but it's still something to consider, and something that doesn't happen at all in video modes that require less bandwith. -- Dave Haynie Commodore-Amiga Usenet: {ihnp4|caip|rutgers}!cbmvax!daveh "The A2000 Guy" PLINK : D-DAVE H BIX : hazy "Catch a wave and you're sittin' on top of the world" -Beach Boys
grr@cbmvax.UUCP (George Robbins) (08/12/87)
In article <329@io.UUCP> ebr (Evan B. Ross) writes: > I've been looking at the signetics Intelligent Multiple Disk Controller > (imdc - 68454) and thinking about building a hard-disk interface > for my amiga. The real question, however, is whether or not the > imdc's dma will work in the amiga environment. > The expansion spec tends to be a bit vague on some of the signal > timings and I was wondering if anyone had any comments/advice about > hooking up dma masters. > Can the amiga cope with a dma master is running asynchronously to > the 68000 clock? The Amiga expansion bus was designed with the standard Motorola DMA controller chip in mind. You should be able to get a compatible chip to work without too much trouble. Note that the Amiga implementation is *no* asynchronous, so you may need to add additional logic, particularly in the area of gating data to or from the bus. -- George Robbins - now working for, uucp: {ihnp4|seismo|rutgers}!cbmvax!grr but no way officially representing arpa: cbmvax!grr@seismo.css.GOV Commodore, Engineering Department fone: 215-431-9255 (only by moonlite)