[comp.sys.amiga] Motorola DSP chip

jesup@cbmvax.UUCP (Randell Jesup) (10/21/88)

In article <6636@batcomputer.tn.cornell.edu> eacj@tcgould.tn.cornell.edu (Julian Vrieslander) writes:
>The Motorola 56001 DSP chip used in the Next box is a fixed point RISC
...
>I've heard one estimate saying that at the 44.1 kHz sample rate used
>by CDs, it can do about 200 instructions between samples.

	Actually, give 25Mhz cycles and mostly 1-cycle instruction, it can
do close to 600 operations per 44.1KHz sample.

-- 
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Randell Jesup, Commodore Engineering {uunet|rutgers|allegra}!cbmvax!jesup

todd@ivucsb.UUCP (Todd Day) (10/22/88)

In article <5054@cbmvax.UUCP> jesup@cbmvax.UUCP (Randell Jesup) writes:
_In article <6636@batcomputer.tn.cornell.edu> eacj@tcgould.tn.cornell.edu (Julian Vrieslander) writes:
_>The Motorola 56001 DSP chip used in the Next box is a fixed point RISC
_...
_>I've heard one estimate saying that at the 44.1 kHz sample rate used
_>by CDs, it can do about 200 instructions between samples.
_
_	Actually, give 25Mhz cycles and mostly 1-cycle instruction, it can
_do close to 600 operations per 44.1KHz sample.

Well, CURRENT production chips are rated at 20.5MHz, and you only get
half that for instructions (2 clock cycles / instruction cycle).  This
means 232 instructions per sample at 44.1kHz sampling rate.

The chip can do a n-tap FIR filter in 7+n cycles, so it can do a
225 point FIR on each sample.  VERY impressive!

Inside sources at Motorola claim chip is underrated, and most can do
about 25MHz, if you want to push them.  Next January, 27MHz 56000s will
be out.

 
 
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