monty@sagpd1.UUCP (Monty Saine) (09/28/89)
FTWC here is some information that applies to A1000's with the Cris Erving
ram expansion (with the Dave Haynie addressing mod). The following table
lists the address/data/chip relationship for this memory mod. I had posted a
request for this information earlier and after getting no response I RTFM
and finally figured it out.
addr range ras d0-d3 d4-d7 ras d8-d11 d9-d15
--------------------------------------------------------------------------------
C00xxx-C1fxxx LC5 U1E-M U1D-M UC5 U1C-M U1B-M
C20xxx-C3Fxxx LC4 U2E-M U2D-M UC4 U2C-M U2B-M
C40xxx-C5fxxx LC7 UIE-T UID-T UC7 U1C-T U1B-T
C60xxx-C7Fxxx LC6 U2E-T U2D-T UC6 U2C-T U2B-T
--------------------------------------------------------------------------------
The UCx and LCx number are references to the ras lines added in the mod,
and the -M and -T refer to the Middle and Top chips respectivly in the three
chip stack formed by the mod. The dx correspond to the data bits handled by
the particular chip. i.e bad data at c00000 in the least significant nibble
means a problem with the middle chip in the stack at U1E.
Hope this helps someone.
Monty Saine