BARRETT@owl.ecil.iastate.edu (Marc Barrett) (03/08/90)
I need some feedback on a little project I've been considering for the Amiga. It is very, very simple electronically, but may come in handy when the ECS comes out. As many of you know, the Amiga uses a 28.5Mhz clock, which is divided by four by the Agnus chip to produce the 7.12Mhz clock. The original 28.5Mhz signal is available onthe RGB port. Also on the RGB port are a number of lines that are meant for feeding an external clock signal to the Amiga. Genlocks use this to replace the Amiga's clock with their own clock, thus synchronizing the Amiga to the video input of the genlock. What I would like to know is this: should it be possible to use these input lines to feed in a clock signal to the Amiga that is somewhat higher than normal, but within range of tolerance of the Amiga's chips? The project I am speaking of would replace the 28.5Mhz clock with a 40Mhz signal. This signal would be divided by four to produce a 10Mhz base frequency instead of the normal 7.12Mhz. This would have the effect of speeding everything up across the board -- video, audio, everything. The video in particular would have a higher frequency: in interlace mode, the 'jitter' would be occurring at 43Hz instead of 30Hz, reducing the flicker significantly. Of course, the Amiga's video would be totally unuseable on a normal monitor, but a multisync monitor would be able to sort everything out. "What's the point?" you may ask. "The flicker fixer totally eliminates the flicker." But, there are new interlace modes in the new chipset, and there will likely never be a flicker fixer to deinterlace these modes, because the cost would be prohibitive. Thus, this method would be the only way to reduce the flicker in the 640x960 and 1280x400 modes of the ECS. I have not had a chance to test my little project yet, as I haven't been able to afford a multisync monitor. -MB-
swarren@convex.com (Steve Warren) (03/09/90)
In article <13188@baldrick.udel.EDU> BARRETT@owl.ecil.iastate.edu (Marc Barrett) writes: > The project I am speaking of would replace the 28.5Mhz clock with a 40Mhz >signal. This signal would be divided by four to produce a 10Mhz base frequency >instead of the normal 7.12Mhz. This would have the effect of speeding everything >up across the board -- video, audio, everything. The video in particular would >have a higher frequency: in interlace mode, the 'jitter' would be occurring at >43Hz instead of 30Hz, reducing the flicker significantly. My guess is that this increase by about 35% is way over the built-in margins. I would expect that a lot of logic is going to miss set-up times if you clock it at a 35% faster rate. All those custom chips have got to have some pretty tight timing in spots. Most likely the enhanced custom chip set (God speed it) will have significantly tighter timing constraints. But it sounds easy enough to test if you want to try it out. Don't let me stop you ;^). -- --Steve ------------------------------------------------------------------------- {uunet,sun}!convex!swarren; swarren@convex.COM
cmcmanis@stpeter.Sun.COM (Chuck McManis) (03/09/90)
In article <13188@baldrick.udel.EDU> (Marc Barrett) writes: > I need some feedback on a little project I've been considering for the Amiga. > It is very, very simple electronically, but may come in handy when the ECS > comes out. > > As many of you know, the Amiga uses a 28.5Mhz clock ... > I ... would replace the 28.5Mhz clock with a 40Mhz signal. Don't bother, just under 30Mhz and the system can't handle it any more. If you can get access to a school EE lab you can do the experiment very simply, just hook up a frequency generator and crank it up. The advantage of using the freq generator is that you can also vary the duty cycle and see how that helps. --Chuck McManis uucp: {anywhere}!sun!cmcmanis BIX: cmcmanis Internet: cmcmanis@Eng.Sun.COM These opinions are my own and no one elses, but you knew that didn't you. "If it didn't have bones in it, it wouldn't be crunchy now would it?!"
Sullivan@cup.portal.com (sullivan - segall) (03/09/90)
> > As many of you know, the Amiga uses a 28.5Mhz clock, which is divided by four >by the Agnus chip to produce the 7.12Mhz clock. The original 28.5Mhz signal is >available onthe RGB port. Also on the RGB port are a number of lines that are >meant for feeding an external clock signal to the Amiga. Genlocks use this to >replace the Amiga's clock with their own clock, thus synchronizing the Amiga to >the video input of the genlock. > > What I would like to know is this: should it be possible to use these input >lines to feed in a clock signal to the Amiga that is somewhat higher than normal, >but within range of tolerance of the Amiga's chips? > > The project I am speaking of would replace the 28.5Mhz clock with a 40Mhz >signal. This signal would be divided by four to produce a 10Mhz base frequency >instead of the normal 7.12Mhz. This would have the effect of speeding everything >up across the board -- video, audio, everything. The video in particular would >have a higher frequency: in interlace mode, the 'jitter' would be occurring at >43Hz instead of 30Hz, reducing the flicker significantly. > > Of course, the Amiga's video would be totally unuseable on a normal monitor, >but a multisync monitor would be able to sort everything out. "What's the point?" >you may ask. "The flicker fixer totally eliminates the flicker." But, there >are new interlace modes in the new chipset, and there will likely never be a >flicker fixer to deinterlace these modes, because the cost would be prohibitive. >Thus, this method would be the only way to reduce the flicker in the 640x960 >and 1280x400 modes of the ECS. > > I have not had a chance to test my little project yet, as I haven't been able >to afford a multisync monitor. > > > -MB- From previous discussions of the same topic, it seems that the custom chips have very little leeway. Eight MHz would be pushing the top end of their performance. The chips tolerance is similar to the tolerance of the electronics in the standard monitor, so you wouldn't need to get a multisynch anyway. Beyond that, it is my understanding that multisynch monitors try (more than NTSC monitors) to fit incoming signals to an exact frequency. This is done because they actually have to switch modes at some point and display the data differently at different frequencies. To the best of my knowlege they aren't very tolerant of random frequencies. Your input clock signal needs to be clean. (A 555 and a resistor/capacitor won't cut it.) If you want your monitor to synch up, it also needs to be consistent. That means a real crystal, buffers, power filtering, et. al. Frequencies around 40MHz are very susceptible to noise. Your traces are going to need to be as short as possible. Ground leads will need to be well and frequently grounded. All of this is off the top of my head. The project seems feasible... I hope you get it working. Btw, from what I hear the monitor actually has somewhat more leeway than the chips. Someone from overseas claimed to get a PAL monitor to run at NTSC speeds which is a 20% speed up. You should be well within those tolerances. I haven't played with any of this stuff since college, so all information is courtesy of prior messages on USENET. Truth value subject to change without notice. -Sullivan Segall _________________________________________________________________ /V\ Sullivan was the first to learn how to jump without moving. ' Is it not proper that the student should surpass the teacher? To Quote the immortal Socrates: "I drank what?" -Sullivan _________________________________________________________________ Mail to: ...sun!portal!cup.portal.com!Sullivan or Sullivan@cup.portal.com
rasp@trism.UUCP (Ralph Spitzner) (03/14/90)
In article <100463@convex.convex.com> swarren@convex.com (Steve Warren) says: > In article <13188@baldrick.udel.EDU> BARRETT@owl.ecil.iastate.edu (Marc Barrett> ) writes: > > The project I am speaking of would replace the 28.5Mhz clock with a 40Mhz [both speaking about speeding things up] I've tried several different Oscillators in my A500 the summary is that you can stuff in any frequency upto about 36MHz. At 36MHz (as one should know :-) ) your CIA's wont do any correct disk- access, also some chip seems to have difficulties too, I've noticed that when you move the mouse around a bit you'll get some splutter on the screen that devinitly doesn't belong there. Oh yeah, at frequencies above 36M my FAT Angus didn't do nothing anymore :-( -rasp