a186@mindlink.UUCP (Harvey Taylor) (05/24/90)
In <1990May23.021804.12469@uncecs.edu>, urjlew@uncecs.edu (Rostyk Lewyckyj) writes: [table deleted] >(with no apologies, I have shortened the above table to close >competitors of the AMIGA) Pity. This group seems to need the perspective. > Now on with my tangent :-) [...] >By the above figures, if they mean anything, Zorro III is being rated >slower than the NuBus and MCA. Personally I doubt some of these >numbers, although I have seen those for MCA in comp.arch. I doubt them too. How are they generated? [...] >In any case whatever the bus speed may be what matters in the end is >benchmarked thruput on the job stream of your choice. So far posted >repeatable head to head comparison benchmark results are sadly lacking >in the network mcbyc computer wars. Anybody done this? [...] >What fraction of the time will the cpu be idle waiting for operands >from memory when doing A + B ? and what fraction of the time will >the bus be idle waiting on the cpu for A * B or A/B ? Is it not the case that whenever the Execution Unit is tied up with a many cycle op such as MULT that the Bus Controller will take the opportunity to start refilling the caches? "Accurate reckoning - the entrance into the knowledge of all existing things and all obscure secrets." -Ahmes the scribe, ca.1700 BC Harvey Taylor Meta Media Productions uunet!van-bc!rsoft!mindlink!Harvey_Taylor a186@mindlink.UUCP
a186@mindlink.UUCP (Harvey Taylor) (05/24/90)
In <11765@cbmvax.commodore.com>, daveh@cbmvax.commodore.com (Dave Haynie) | |In article <1990May23.021804.12469@uncecs.edu> urjlew@uncecs.edu |(Rostyk Lewyckyj) writes: |>In article <1843@mindlink.UUCP>, a186@mindlink.UUCP (Harvey Taylor) writes: | |>Since C= had just changed the bus and added the IBM/PC |>bus, I wrote that the A3000 would use the NuBus for compatability |>with the Mac (easy use of Mac expansion cards :-) ). Apparently |>Mr. Haynie took the posting seriously, because he wrote me asking |>why I thought he would use the NuBus and criticised it as being slow. Please note that I didn't write any of this >quoted material. |Yeah, I remember that. And what that table doesn't show you is that |68030 to NuBus interface on the Mac IIs runs about 5 MB/s. How do you know this? I'm not doubting you in particular, I'm just looking for an EE101 answer to how to measure &/calculate bus speeds. | [...] | I suppose if I sat down and |calculated maximum theoretical Zorro III speed, I'd tell you that it maxes |out at 50 MB/s for a standard full cycle, over 150 MB/s for a full burst |cycle. But that's simply based on the specification; | | [...] |That says nothing about how fast other bus masters might go, nor how fast a |future Amiga may be able to drive Zorro III. Same questions... "Accurate reckoning - the entrance into the knowledge of all existing things and all obscure secrets." -Ahmes the scribe, ca.1700 BC Harvey Taylor Meta Media Productions uunet!van-bc!rsoft!mindlink!Harvey_Taylor a186@mindlink.UUCP
kevine@vast.eecs.unsw.oz (Kevin Elphinstone (4th Year)) (05/25/90)
20Mbytes/sec bus speed on an A3000 is not as bad as some of you are making out it is. I checked the docs I have for MCA on IBM's new toy, the RISC System 6000, and they claim 20M to 25M sustainable, and up to 40M peak. But before you're head swells to much, the cache <-> memory speed is 400Mbytes/sec peak. They use a 128 bit bus with two 64 bit memory banks, with four way interleaving in each bank to give a claimed cycle time of 40nsec. Pretty amazing stuff. It seems that for 32 bit buses though, the A3000 stacks up pretty well Kevin
new@udel.EDU (Darren New) (05/26/90)
In article <1890@mindlink.UUCP> a186@mindlink.UUCP (Harvey Taylor) writes: >In <11765@cbmvax.commodore.com>, daveh@cbmvax.commodore.com (Dave Haynie) >| >|In article <1990May23.021804.12469@uncecs.edu> urjlew@uncecs.edu >|(Rostyk Lewyckyj) writes: >|>In article <1843@mindlink.UUCP>, a186@mindlink.UUCP (Harvey Taylor) writes: >| >|>Since C= had just changed the bus and added the IBM/PC >|>bus, I wrote that the A3000 would use the NuBus for compatability [...] > > Please note that I didn't write any of this >quoted material. Several people (including Marco) have made this mistake in the past. Note that the number of '>'s in front of the quote of person X is always one greater than the number of '>'s in front of the "In article X said" line. In this case, Lewyckyj said the quoted material and quoted you within it, but the poster deleted what you said. Actually, your name should have been taken out to avoid confusion, but it does not say that you said "Since C= ..." -- Darren
daveh@cbmvax.commodore.com (Dave Haynie) (05/30/90)
In article <1890@mindlink.UUCP> a186@mindlink.UUCP (Harvey Taylor) writes: >In <11765@cbmvax.commodore.com>, daveh@cbmvax.commodore.com (Dave Haynie) >|In article <1990May23.021804.12469@uncecs.edu> urjlew@uncecs.edu >|(Rostyk Lewyckyj) writes: >|Yeah, I remember that. And what that table doesn't show you is that >|68030 to NuBus interface on the Mac IIs runs about 5 MB/s. > How do you know this? I'm not doubting you in particular, I'm just > looking for an EE101 answer to how to measure &/calculate bus speeds. Well, I know this mainly because I've seen the figure quoted over and over again in discussions of the Mac NuBus. But the basic information on the bus interface is that NuBus is a synchronous bus clocked at 10MHz. The minimum bus cycle is two 10MHz clocks (20 MB/s), though most devices run in three clocks (13MB/s). A basic Mac II or IIx runs a 15.8MHz bus, and must sync up to the NuBus to achieve a transfer. It must take at least 100ns, worst case, to sync up simply based on the 10MHz clock of NuBus, though I recall hearing it's more like a worst-case of 150ns. Once data transfer is acknowledged on the NuBus, this must be translated into 68030 DSACK. I don't have the NuBus specification handy to be sure how soon the 68030 can react to data transfer being acknowledged. In any case, it's the 68030 to NuBus translation that results in the maximum effective bus speed of NuBus. You rarely have a perfectly efficient bus translation in any bus converter. Some work quite very efficiently, others are trouble. In general, the more similar the two buses are, the better the conversion efficiency. So you might expect Microchannel to 80386 conversion to work better than 68030 to NuBus conversion, since NuBus looks far less like 68030 bus than Microchannel resembles 80386. The other stumbling point is clock conversion. The Mac II, IIx, and IIci systems each have a main CPU clock that have no relation to the NuBus clock, so synchronizers much be employed at various points to avoid any metastabilities in the 68030-to-NuBus cycle conversion state machine. On the NeXT machine (which apparently runs a CMOS level NuBus with a 12.5MHz NuBus clock and 25MHz system clock) or a Mac IIfx (which has a 20MHz local system bus), the bus converter doesn't have to work out any major asynchronicities, so the CPU to bus interface on either of these systems has a chance, depending on its implementation, of being much more efficient. >|That says nothing about how fast other bus masters might go, nor how fast a >|future Amiga may be able to drive Zorro III. > Same questions... Well, for timing the maximum theoretical speeds for Zorro III full and multiple cycles, I simply pulled out "The Zorro III Bus Specification by Dave Haynie", flip to "Chapter 5: Timing", and add up the various lengths of different cycle events for each type of cycle. That figure sets the minimum possible cycle time on the bus, in nanoseconds in this case. A cycle transfers 4 bytes, so if you know ns/byte, it's easy to find bytes/ns, and ultimately, megabytes/second. Again, actual Zorro III cycle time is based on the efficiency of the Zorro III bus master and Zorro III bus slave acting together. A 68030 isn't a perfect Zorro III bus master, so you'll find that, for a given memory chip speed, a 68030 will talk to a 68030 memory design faster than a Zorro III memory design. It'll be harder or more expensive to build a Zorro III memory board that'll go 20MB/s with a 68030 (I built one, but it uses expensive SRAM) than it would be to build a native 68030 memory board that'll go 20MB/s with a 68030. That's rather common on I/O buses, and a well designed I/O bus master will be able to drive the Zorro III bus significantly faster than the 68030, or most any CPU, can. > Harvey Taylor Meta Media Productions -- Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy "I have been given the freedom to do as I see fit" -REM