BARRETT@owl.ecil.iastate.edu (Marc Barrett) (09/18/90)
No Commodore flames this time, just a question. What would be the
theoretical maximum continuous data transfer rate of the Zorro III bus?
The reason I am asking this is because I am throwing around the
idea of a frame buffer for the A3000 that has no memory of its own
for the 24-bit image, but that uses 32-bit memory in the Zorro III
memory space.
If this would be possible, this could solve a number of problems,
including CPU access to the 24-bit image, and the problem of compatibility
standards for 24-bit frame buffers. If this is possible, the standards
problem could be solved because Commodore could dictate the way all
such frame buffers store their data in memory, insuring compatibility
amongst such third-party products.
-MB-Radagast@cup.portal.com (sullivan - segall) (09/18/90)
> > No Commodore flames this time, just a question. What would be the >theoretical maximum continuous data transfer rate of the Zorro III bus? > > The reason I am asking this is because I am throwing around the >idea of a frame buffer for the A3000 that has no memory of its own >for the 24-bit image, but that uses 32-bit memory in the Zorro III >memory space. > I'm an ISA bus hardware hack, not Zorro, but I just happen to have finished designing a card with a similar purpose. Although the AT bus can't come close to the kind of throughput I'm looking for without seriously degrading the system, there is really a much simpler solution. Build a memory card with memory as fast as you need (we are using 25ns SRAMS) and force the CPU into a wait state whenever the back end of the card needs access to the memory. Assuming that the bus is 16 bits wide, and you are shifting out 1 bit at a time, you will only cause wait states one sixteenth of real time. Of course on ISA there isn't any real provision for multiple bus masters, so I would have to wait for at least two bus cycles for any read from external memory, and at that I would be using all of the throughput available. But even with a Zorro bus I would imagine that it is more polite to stay off of the bus if you don't need it. The CPU would be able to write to memory at full speed (less at most about a 16th) and the board would have instant access (60ns or so) access to its own memory any time it wants it. (Please ignore this posting as I most certainly wouldn't want to pretend to know what I'm talking about...) Seriously, from our standpoint the above was the best solution to our problem. On output we get 16 Mbit continuous streams ( <5 ns bits ). -kls -Sullivan_-_Segall (a.k.a. Radagast) _______________________________________________________________ /V\ "I regret to say that we of the FBI are powerless to act in ' cases of oral-genital intimacy, unless it has in some way obstructed interstate commerce." -- J. Edgar Hoover _______________________________________________________________ Mail to: ..osun!portal!cup.portal.com!radagast or radagast@cup.portal.com