thamilton@ch3.intel.com (Tony Hamilton, WF1-81, x48142) (09/12/90)
To whoever posted the idea that Intel chips just don't compare to Motorola's,
I can not agree more. They DON'T compare, because they follow two entirely
different principles. Motorola utilizes memory-mapping, while Intel uses
Isolated I/O. Each has various advantages and downfalls. When saying they
don't compare, I surely hope you infer that they are nothing alike, and not
that one is better than the other. The unfortunate thing is that most users
can only see the advantages of memory-mapping, while Intel chips are
appreciated most in the high end of the market.
Defending Intel interests across the globe...
Tony Hamilton
THamilton@ch3.intel.comgriffith@eecs.cs.pdx.edu (Michael Griffith) (09/12/90)
thamilton@ch3.intel.com (Tony Hamilton, WF1-81, x48142) writes: >Isolated I/O. Each has various advantages and downfalls. When saying they >don't compare, I surely hope you infer that they are nothing alike, and not >that one is better than the other. The unfortunate thing is that most users > >Defending Intel interests across the globe... > > Tony Hamilton > > THamilton@ch3.intel.com It is true that there are advantages and disadvantages to memory mapped I/O and isolated I/O, but I still must disagree. Motorola chips are better, in my own opinion (in other words, please no flames. Go ahead and disagree but please don't get mad.) because of the somewhat higher degree of portability and the support of the 68000 which enables the upgrade to full 32-bit code to go so smoothly. The basic register set of the 68000 is still better than that of the 386 (I don't have full stats on the 486 lying around, so I can't tell you if that one does), with 8 general purpose data registers and 7 general purpose address registers (although a7 is most commonly used as the stack pointer the use of a7 or any register as a stack is not strictly enforced by it). I must say, I feel very hampered when programming assembly on an 80x86 based machine because of the lack of registers and the strict rules enforced by the use of segmentation/offset registers and the fact that the four "general purpose" registers are hardly ever available for general purpose. However, I don't want to mislead you into thinking I find no fault with Motorola. The 68000 series has, I believe, around four different exception frames for the stack. Also, I could have wished for an instruction which provides chip identification so that it would be a bit easier to recognize which version of the chip a program is running on. But for power vs. price vs. performance I think I would always have to pick Motorola over Intel. (Or rather when forced to choose between the chip series MC68000 and i80x86.) | Michael Griffith | If I had an opinion it certainly | | griffith@eecs.ee.pdx.edu | wouldn't be the same one as | | ...!tektronix!psueea!eecs!griffith | Portland State University anyways. |
greg@walt.cc.utexas.edu (Greg Harp) (09/12/90)
#define SARCASTIC_FLAMING :-) In article <30140@nigel.ee.udel.edu> thamilton@ch3.intel.com (Tony Hamilton, WF1-81, x48142) writes: >To whoever posted the idea that Intel chips just don't compare to Motorola's, >I can not agree more. They DON'T compare, because they follow two entirely >different principles. Motorola utilizes memory-mapping, while Intel uses >Isolated I/O. Each has various advantages and downfalls. When saying they >don't compare, I surely hope you infer that they are nothing alike, and not >that one is better than the other. The unfortunate thing is that most users >can only see the advantages of memory-mapping, while Intel chips are >appreciated most in the high end of the market. Just exactly what "high end of the market" are we speaking of? The high end of the market either uses someone else's RISC processor (usu. NOT Intel's -- MIPS tends to get a larger share of _that_ high end market) or makes their own (i.e. supercomputers and the like). If you're talking about high end PC's, you're _still_ mistaken. At least from _my_ experience, most programmers prefer Motorola assembly over Intel. I also have a few questions about your statements: 1) Just what advantages are there in "Isolated I/O"? (IMNSHO, "Isolated I/O" is a PR term describing the song and dance one has to go through to do I/O on an Intel machine.) 2) Just what disadvantages are there in memory-mapping? 3) Why isn't there a popular Intel machine with an OS better that MessyDOS? (OS/2 ("Half OS") and Windows don't qualify as better -- just different.) 4) Do you really believe that the reason that the market has clung onto the IBM "standard" is the Intel processor in it? (Analogy: We've known that cigarettes were bad for us twice as long as we've known that Intel was -- it's just habit.) And lastly: 5) How can you defend a company that constantly breaks away from the standard and starts their own? (Remember EPROMs? Couldn't make them ROM pin compatible. Noooo...) >Defending Intel interests across the globe... Defending the globe from Intel... :-) > Tony Hamilton > > THamilton@ch3.intel.com #undef SARCASTIC_FLAMING ...of course, _some_ Intel chips are nice. Just NOT the 80x86 or the i860. greg... _ _ Disclaimer: "What I _really_ meant was..." AMIGA! //// //// "Don't look so frightened. This is just a passing phase -- one of _ _ //// my bad days." --Roger Waters, Pink Floyd's The Wall, One of My Turns \\\\//// \\XX// Greg Harp greg@ccwf.cc.utexas.edu
ckp@grebyn.com (Checkpoint Technologies) (09/13/90)
In article <30140@nigel.ee.udel.edu> thamilton@ch3.intel.com (Tony Hamilton, WF1-81, x48142) writes: >To whoever posted the idea that Intel chips just don't compare to Motorola's, >I can not agree more. They DON'T compare, because they follow two entirely >different principles. Motorola utilizes memory-mapping, while Intel uses >Isolated I/O. Each has various advantages and downfalls. When saying they >don't compare, I surely hope you infer that they are nothing alike, and not >that one is better than the other. The unfortunate thing is that most users >can only see the advantages of memory-mapping, while Intel chips are >appreciated most in the high end of the market. > >Defending Intel interests across the globe... > Tony Hamilton > THamilton@ch3.intel.com Well, I'm going to indulge myself, just this once, in this public forum... I think Intel made these mistakes in the original 8086 16-bit architecture, and programmers have been paying for it ever since: Foremost, segmented memory, irritated further by the 64K segment size. No definition of a privileged supervisor mode. Specialized-purpose register set. The 286 had a particularly nasty mistake: the new protected mode would not run real mode 8086 programs, because it redefined the interpretation of segment values. This seems particularly idiotic to me, especially when it should have been clear to Intel at the time that a large part of their future would be governed by the IBM PC and it's the ability to run it's applications. At least it has a compatible real mode, but you still only get a 1 Meg address space. On the other hand, Motorola had particular foresight when it designed the 68K to be a 32 bit architecture. This is probably the reason why all the engineering workstations (machines that really needed to be fast) designed in the early 80's used it. -- First comes the logo: C H E C K P O I N T T E C H N O L O G I E S / / \\ / / Then, the disclaimer: All expressed opinions are, indeed, opinions. \ / o Now for the witty part: I'm pink, therefore, I'm spam! \/
daveh@cbmvax.commodore.com (Dave Haynie) (09/14/90)
As Larry has said here, it is impossible to both understand and appreciate the Intel architecture. In article <30140@nigel.ee.udel.edu> thamilton@ch3.intel.com (Tony Hamilton, WF1-81, x48142) writes: >To whoever posted the idea that Intel chips just don't compare to Motorola's, >I can not agree more. They DON'T compare, because they follow two entirely >different principles. Motorola utilizes memory-mapping, while Intel uses >Isolated I/O. You're missing the point. First of all, dedicated I/O instructions are an extremely archaic concept. I imagine the only reason they existed on the 8088 in the first place was because the 8088 was designed to be relatively close to assembly-source level compatible with 8080/8085 machines. The use of this technique in the 8080 was mainly to get around address space limits (you could have 64K AND I/O devices at once), but it's a horrible waste of instruction decoding, and the rest of the world does fine without it. You will find that this architectural foolishness is just about nonexistant outside of the 80x86 family. Even other Intel chips, like the i860, do things the modern way, by memory mapping. I don't know of any modern microprocessor that supports I/O-only instructions. The generic objections to the Intel architecture, however, have absolutely nothing to do with I/O mapping. They have to do with segmentation. Segmentation is one of the more truely evil concepts in the microprocessor industry. Again, this was something Intel adpoted to make the transition from 8080 to 8088 less painful. It worked to that end, but has been causing endless pain every since. Motorola, which was in a similar position in the 70's, chose instead to scrap any notions of pseudo-compatibility with their 8-bit line, and instead do a 16 bit microprocessor correctly. Their solution was to make the programmer's model a full 32 bit model, rather than kludging around with a 16 bit model and some banking scheme (eg, everyone then knew that 64K of addressing wasn't enough). The end result has been that every subsequent generation of Motorola 680x0 uses the same programmer's model. Every generation of Intel 80x86, execept for the 80386->80486 jump, has had a new programmer's model and special hardware modes to support the old models. The reason they 80486 has the same model as the 80386? The 80386 was the first 80x86 CPU to support a true 32 bit programmer's model, which made segments unnecessary. So there was no reason to change anything. >The unfortunate thing is that most users can only see the advantages of >memory-mapping, while Intel chips are appreciated most in the high end of >the market. The Intel 80x86 architecture isn't appreciated anywhere near the high end of any market. It's used by folks who find 80486 machines a good bang/buck, or by folks who find that the installed base of 30-40 million MS-DOS machines and growth of another 10 million or so a year tends to make rather esoteric programs available on the market. Or by people who don't know any better. But there are few, if any, people who choose 80x86 machines because they admire their architecture. And I'm willing to bet just as many people buy Ford Escorts for their styling. >Defending Intel interests across the globe... Now there's a lost cause... > Tony Hamilton -- Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy Get that coffee outta my face, put a Margarita in its place!
seanc@pro-party.cts.com (Sean Cunningham) (09/15/90)
In-Reply-To: message from thamilton@ch3.intel.com Intel chips are appreciated mostly in the "high-end"? Well, where do you define the "high-end"? High-end of the PC market maybe...but up until more companies supplying RISC based systems, Motorolla dominated the workstation market. I've heard from UNIX users, and read in more than one book or magazine, that Intel chips aren't really cut out for UNIX based applications. Up until the i860 (the only chip they produce that I think is worth a ....), Intel chips weren't really suited for graphic based applications. Intel based systems with FPUs have good math performance, I'll grant them that. Intel also has a problem with QC... Sean //////////////////////////////////////////////////////////////////////////// UUCP: ...!crash!pnet01!pro-party!seanc | ARPA: !crash!pnet01!pro-party!seanc@nosc.mil | " Fanatics have their INET: seanc@pro-party.cts.com | dreams, wherewith they | weave a paradise for RealWorld: Sean Cunningham | a sect. " Voice: (512) 994-1602 PLINK: ce3k* | -Keats | Call C.B.A.U.G. BBS (512) 883-8351 w/SkyPix | B^) VISION GRAPHICS B^) \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
bernie@DIALix.UUCP (Bernd Felsche) (09/15/90)
In article <14427@cbmvax.commodore.com> daveh@cbmvax.commodore.com (Dave Haynie) writes: > >As Larry has said here, it is impossible to both understand and appreciate >the Intel architecture. > ditto [quote deleted] > >You're missing the point. First of all, dedicated I/O instructions are an >extremely archaic concept. I imagine the only reason they existed on the >8088 in the first place was because the 8088 was designed to be relatively >close to assembly-source level compatible with 8080/8085 machines. The use >of this technique in the 8080 was mainly to get around address space limits >(you could have 64K AND I/O devices at once), but it's a horrible waste of >instruction decoding, and the rest of the world does fine without it. But, but what about the 680x0's MOVEP instruction? It exists to support the older 6800 chips. And presumably consumes some instruction decoding. I know that "nobody" uses it, but it is there. Or wouldn't you class it as an I/O instruction? Agreed, it is not I/O mapped. but it *is* a special I/O instruction. >-- >Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" > {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy > Get that coffee outta my face, put a Margarita in its place! If we were all perfect, the world would be extremely boring. bernie | bernie@DIALix.oz.au | I don't sign anything until I see the money. :-)
jennifer@storm.UUCP (Jennifer Ann Hunter) (09/20/90)
In article <14427@cbmvax.commodore.com> daveh@cbmvax.commodore.com (Dave Haynie) writes: >The Intel 80x86 architecture isn't appreciated anywhere near the high end of >any market. It's used by folks who find 80486 machines a good bang/buck, or >by folks who find that the installed base of 30-40 million MS-DOS machines >and growth of another 10 million or so a year tends to make rather esoteric >programs available on the market. Or by people who don't know any better. >But there are few, if any, people who choose 80x86 machines because they >admire their architecture. And I'm willing to bet just as many people buy >Ford Escorts for their styling. Our symmetry uses 80386's. This machine I am posting from is a 80486 based machine, and benches faster than a Sun SPARCstation 1+ (well, about the same, actually). I don't know much about the actual architecture of the 80386/68030, though I have done some (limited) assembly in SPARC, 80386, and Motorola 68030 assembly. There are major differences, and I admit that the 80386 is a bit bewildering, but to be fair I started on SPARC, then moved to 68030, then tried 80386. The 68030 is easier to program at an assembly level than an 80386, but that isn't very important to the person who sits and programs in C. The only time I ever even notice the differences between the 68030, the 80386, and SPARC is when I have to write a fast routine in assembly, and that is usually small or simple enough that the difficulty to program is unimportant. Here's a better idea: Just force everyone to use VAX CPU's. (would just about obliterate the need for a high level language :) I would be impressed to see a RISC based Amiga, something based off of a MIPS R3000 or an IBM POWER chip, with the i860 as a graphics processor. I guess commodore would have to rewrite a lot of stuff... oh, well, just wishing. I wonder if a POWER or R3000 chip could simulate an Amiga... --Jennifer
LEEK@QUCDN.QueensU.CA (09/20/90)
In article <566@DIALix.UUCP>, bernie@DIALix.UUCP (Bernd Felsche) says: > >But, but what about the 680x0's MOVEP instruction? It exists to >support the older 6800 chips. And presumably consumes some >instruction decoding. They are not restricted to 68XX perpherial chips. The 8-bit perpherials can also have async bus cycles. The bus controller hardware determines whether the devices want async or sync (68XX) cycles. There is no software instruction to tell it what to use. > >I know that "nobody" uses it, but it is there. Or wouldn't you >class it as an I/O instruction? Agreed, it is not I/O mapped. but >it *is* a special I/O instruction. Wrong again !! ALF2 SCSI driver uses it. It is a special I/O instruction only in what it does - move alternating bytes to/from a data register. This can speed things up as it has a lower overhead (vs 4 instructions) to transfer 4 bytes to/from a 8-bit perpherial device. Surely it can be replaced by MOVE.B if Motorola decided that nobody uses it and they can't live without that Silicon real-estate. > >bernie > >| bernie@DIALix.oz.au >| I don't sign anything until I see the money. :-) K. C. Lee Elec. Eng. Grad. Student P.S. Please read up on 68000 User's Manual by Motorola.
csbrod@medusa.informatik.uni-erlangen.de (Claus Brod ) (09/20/90)
bernie@DIALix.UUCP (Bernd Felsche) writes: >But, but what about the 680x0's MOVEP instruction? It exists to >support the older 6800 chips. And presumably consumes some >instruction decoding. MOVEP not only supports 6800 chips but several other 8-bit peripheral chips. It's a more universal concept.# >I know that "nobody" uses it, but it is there. Or wouldn't you >class it as an I/O instruction? Agreed, it is not I/O mapped. but >it *is* a special I/O instruction. If "nobody" is me, nobody uses it. I'm mainly programming STs, and the MOVEP instruction sometimes serves me well to do some kind of interleaved memory transfer or parameter shuffling. It is not at all worthless on my machine, and I'd think there are many applications for it on Amigas, too. ---------------------------------------------------------------------- Claus Brod, Am Felsenkeller 2, Things. Take. Time. D-8772 Marktheidenfeld, West Germany (Piet Hein) csbrod@medusa.informatik.uni-erlangen.de ----------------------------------------------------------------------