bernie@DIALix.oz.au (Bernd Felsche) (11/25/90)
Instead of an `040, how about somebody building a cache-board? This would have to be write-through architecture, due to the co-processors. 64K I + 64K D would be nice :-), and bus-snooping circuitry essential because of the effective multi-processing. I believe (though I may be proved wrong), that this would not affect the software compatibility in any way, other than speed. Bus contention would be reduced, but more importantly, the `030 could be working without memory wait-cycles most of the time. As an upgrade cost, I expect that this would be less than an `040, and it could be made available NOW! (providing it can be designed over a cup of coffee) Any takers? -- ________Bernd_Felsche__________bernie@DIALix.oz.au_____________ [ Phone: +61 9 419 2297 19 Coleman Road ] [ TZ: UTC-8 Calista, Western Australia 6167 ]
kinners@csvax.cs.ukans.edu (Nancy Kinnersley ) (11/26/90)
In article <611@DIALix.oz.au> bernie@DIALix.oz.au (Bernd Felsche) writes:
: Instead of an `040, how about somebody building a cache-board?
How much speed-up do you suppose a cache would give you, maybe 30 percent?
I doubt if it could be made cheap enough to make it worthwhile.
I'm waiting for a 68040!
--
Nancy Kinnersley
kinners@csvax.cs.ukans.edu