toms@oakhill.UUCP (02/10/87)
I am interested in any information that the net can provide me with about
the underlying hardware for the Intel/Lotus EMS standard. I have been able
to ascertain that this bank switched protocol uses a 64K window in the
PCs memory map that is broken down into 4-16K sections. This is where the
questions start:
Why are there 4 sections (or what ever they are called)?
If one wanted to build their own hardware would 2 sections of 32K
each be a serious draw back to work with?
Does anyone know were one can get sources to an EMS driver either
PD or commercial without buying the hardware? (if no PD
sources are available I will consider purchasing the software
only).
How big are the bank select registers?
Where do they reside in the PC memory map?
Any answers to these questions would be greatly appreciated.
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Motorola Semiconductors Tom Spohrer
Austin, Texas {seismo,gatech,ihnp4}!ut-sally!oakhill!tomsjohnl@ima.UUCP (02/11/87)
In article <838@oakhill.UUCP> toms@oakhill.UUCP (Thomas Spohrer) writes: >I am interested in any information that the net can provide me with about >the underlying hardware for the Intel/Lotus EMS standard. I have been able >to ascertain that this bank switched protocol uses a 64K window in the >PCs memory map that is broken down into 4-16K sections. This is where the >questions start: > > Why are there 4 sections (or what ever they are called)? Entirely arbitrary, but that's what the spec says. > If one wanted to build their own hardware would 2 sections of 32K > each be a serious draw back to work with? No program that uses LIM memory would work, since they expect four 16KB sections. > Does anyone know were one can get sources to an EMS driver either > PD or commercial without buying the hardware? (if no PD > sources are available I will consider purchasing the software > only). I've never seen software that wasn't bundled in along with the hardware. Then again, supporting as much of the software interface as you need to make most programs work isn't very hard. > How big are the bank select registers? Fourteen bits or so. > Where do they reside in the PC memory map? In the I/O address space. >Any answers to these questions would be greatly appreciated. Lotus and Intel published a spec defining the LIM interface, which you can probably still get from Lotus here in Cambridge or from Intel in Hillsboro. The spec defines the memory scheme (four 16K chunks in a 64K window) and a bunch of driver calls you can make to allocate pages, give them back, map them in and out, find out useful parameters like where the window is, and some save/restore state calls that look like they're intended to support multitasking systems. Early versions of the spec tried to define the exact locations and formats of the I/O registers that control the mapping. More recent versions don't, and make you do all of your mapping by calls into the driver. That sounds horribly slow, but it turns out not to be that bad since a well-written driver should be able to handle the map call in a few dozen instructions, and in real programs the code needed to figure out what page you want is much larger than that anyway. There are also some software-only products that purport to simulate EMS memory by allocating a 64K bank of real memory and swapping the 16K chunks to and from extended memory (regular memory above 1MB) or the disk. These programs sort of work for some programs, but it turns out that you cannot properly support EMS without hardware that lets you map the same page to more than one of the 16K windows, so that many programs do not work. Even those that do work are incredibly slow since moving 16K chunks means that remap calls take milliseconds rather than microseconds (or if they're swapping to the disk, seconds rather than microseconds.) Accept no substitutes. -- John R. Levine, Javelin Software Corp., Cambridge MA +1 617 494 1400 { ihnp4 | decvax | cbosgd | harvard | yale }!ima!johnl, Levine@YALE.something Where is Richard Nixon now that we need him?