bobr@zeus.TEK.COM (Robert Reed) (08/05/87)
From what I understand, it is true that the Compaq 386 AT bus runs at 8 MHz. However, system memory is plugged into a special 32 bit slot which supposedly runs at 16 MHz provides up to 10MB of zero wait state memory. -- Robert Reed, Tektronix CAE Systems Division, bobr@zeus.TEK
john@hpcvlo.HP.COM (John Eaton) (08/11/87)
<<<< < < The static column RAMS have (I think) 50ns access times for addresses < within the same column, and 100ns for addresses outside that column. The < 100ns time gives two wait states, the 50ns time gives zero waits. < Unfortunately, I don't really understand all this. ---------- It really quite simple. To read a random bit from a Static Column D-ram you put the Row address into the ram and strobe RAS. This causes the entire row to be copied into a buffer. You then put the Column address into the ram and drop CAS. This selects the bit from the buffer and drives it out. If you then need any other bits from the same row they are available simply by changing the Columnn address. You do not have to repeat the row address. In a 32 bit system with 1 Meg rams this gives you a 4 Kbyte cache page using the buffers that are built into the rams themselves. The first access to a random location will require wait states but all the rest in that 4K page are "free". The only problem besides the tendency of programs to seperate their Code and Data areas is that you have to restrobe RAS after every refresh. This is not as expensive as a true cache system and will even outrun a true cache machine if your program has a low enough hit rate. John Eaton !hplabs!hp-pcd!john