cfb@ihdev.UUCP (08/15/87)
I want to use the DMA (direct memory access) chip to output alot of data
quickly from RAM to a custom plug-in board in an XT. Can anybody tell me
the addresses I need to access and the procedure for outputing data using
the DMA.
Thanks,
Chris Bussan
ihdev!cfbspm@edison.GE.COM (Steve Monett) (08/19/87)
In article <1526@ihdev.ATT.COM>, cfb@ihdev.ATT.COM (C. F. Bussan) writes: > I want to use the DMA (direct memory access) chip to output alot of data > quickly from RAM to a custom plug-in board in an XT. Can anybody tell me > the addresses I need to access and the procedure for outputing data using > the DMA. The latest issue of Micro Cornucopia (Sept/Oct 1987) contains an article titled "DMA Control on the PC". The article goes into considerable detail on theory use and abuse of the 8237 DMA controller as it is used in the PC. You can call Micro C at (503)-382-5060 if you can't find the magazine locally. -- Steve Monett GE Fanuc Automation - Charlottesville, VA spm@edison.GE.COM old arpa: spm%edison.GE.COM@seismo.CSS.GOV spm@edison.UUCP old uucp: {seismo,decuac,houxm,calma,hpfcla}!edison!spm
phil@amdcad.AMD.COM (Phil Ngai) (08/21/87)
In article <1128@edison.GE.COM> spm@edison.GE.COM (Steve Monett) writes: >The latest issue of Micro Cornucopia (Sept/Oct 1987) contains an article >titled "DMA Control on the PC". The article goes into considerable >detail on theory use and abuse of the 8237 DMA controller as it is used >in the PC. You can call Micro C at (503)-382-5060 if you can't find the Yeah, but the bozo asks "how can you do 512 refreshes in 2 ms if the interval is 15 us?" and then doesn't answer the question. I don't know if it was because he forgot or if he just didn't know the answer. In either case, I am unimpressed. -- I speak for myself, not the company. Phil Ngai, {ucbvax,decwrl,allegra}!amdcad!phil or amdcad!phil@decwrl.dec.com
john@hpcvlo.HP.COM (John Eaton) (08/26/87)
<<<< < Yeah, but the bozo asks "how can you do 512 refreshes in 2 ms if the < interval is 15 us?" and then doesn't answer the question. I don't know < if it was because he forgot or if he just didn't know the answer. In < either case, I am unimpressed. ---------- At least the "Bozo" knew enough about the PC to realize that you can't use the Memory-Memory transfer mode of the 8237. I have seen some articles that claimed you could use it. His problem with the refresh was that he didn't realize that the PC's rams only needed 256 refresh addresses in a 4 ms time period. The 15 us refresh works fine. As far as articles about the 8237 it was better than most. He did have other problems with: 1) Simultaneous Memory and I/O strobes. An important distinction of the 8237 is that it drives two strobes at once. This was not mentioned in the article. 2) DMA Wait states. The article mentions that you can insert wait states in a DMA cycle. Well you can but it doesn't do you any good. On a IO Read- Memory Write cycle the PC's ram will latch the data from the falling edge of MEMW~ irregardless of how wide the cycle is. If you can't meet the base system timing then adding wait states won't help. 3) DMA page registers. Contrary to popular belief the page registers for channels 1,2 and 3 are not at 81,82 and 83. They are at 83,81 and 82. This is a small price to pay for something that probably saved two inches of PC trace and a couple of feedthru's. 4) The author claims that a "8237-5 in my Clone digests 7.37 MHZ quite happily". Clocking a 8237 faster than 6 MHZ will produce a DACK pulse width that falls below the mimimun required for a 765 disk controller in verify mode. This is why FORMAT fails on many PC's that are speeded up. John Eaton !hplabs!hp-pcd!john