jja@tut.fi (Ahola Jari) (07/08/88)
Hey, wot's this? What has happened to 80386's opcodes IBTS and XBTS (insert and extract bit streams) ? MASM 5.0 regocnises the opcodes, but doesn't generate the right code. Has this been fixed in MASM 5.X or are these opcodes no longer supported in 80386? -jja -- Jari 'jja' Ahola | Tampere University of Technology, CS dept. Opiskelijankatu 16 A 12 | P.O. Box 527, 33101 Tampere, Finland 33720 Tampere | Tel (intl) 358 31 162708 (work)/358 31 174009 (home) Finland. Puh. 931-174009| Net address: jja@tut (UUCP) AHOLA@FINTUTA (BITNET)
jmc@lzaz.ATT.COM (J.M.CLAIRMONT) (07/15/88)
I am running a 6300+ and have an 80286 Ice Pod. Running the ice I get an 02 system failure. I think it may have to do with the switch from user mode to protected mode. I do not have the ROM BIOS for the 6300+. Has anyone run an Intel 80286 Ice plugged into a 6300+ and made it work? If you have I would appreciate some help or suggestions. Our support with Intel ran out last month and Intel refuses to assist us even though we have purchased millions of dollars of their c*ap. What jerks. Email or call me a 201-576-7912. Thanks. Jan
richardh@killer.UUCP (Richard Hargrove) (07/16/88)
In article <4071@korppi.tut.fi>, jja@tut.fi (Ahola Jari) writes: > What has happened to 80386's opcodes IBTS and XBTS (insert and extract > bit streams) ? MASM 5.0 regocnises the opcodes, but doesn't generate the > right code. Has this been fixed in MASM 5.X or are these opcodes no longer > supported in 80386? First, these mnemonics are not documented in Intel's _80386 Programmer's Reference Manual_. I checked both chapter 17, "80386 Instruction Set", and Appendix A, Opcode Map. So my question is: What opcodes are supposed to be the correct ones for the above instructions? richard hargrove ...!{ihnp4 | codas | cbosgd}!killer!richardh --------------------------------------------
mslater@cup.portal.com (07/18/88)
> correct opcodes for 386 bit string insert and extract instructions
These instructions, which were documented in early 386 data sheets, are
not supported. According to Intel's errata sheet:
"Since the 80386 has unique and powerful 64-bit Double Shift instructions,
and fast multi-bit shift and rotate instructions, the "Bit String Insert"
and "Bit String Extract" instructions were removed. The insert/extract
complex instructions did not provide an additional benefit that fully
justified including them in 80386 silicon and all future compatible
processors. A review concluded that the 80386 user obtains full performance
in bit string manipulations using other powerful instructions such as 64-bit
Double Shift, and other multi-bit shift/rotate instructions. These
instructions support extremely fast manipulation of general unaligned bit
strings of any length, by processing them in 32-bit chunks."
The question that naturally arises is, so why were these instructions
included in the architecture in the first place? I suppose we could be
generous and take Intel's explanation at face value, and assume that
the inclusion of these instructions was an overzealous action on the
part of some architect that Intel later saw fit to rectify.
On the other hand, I tend to be more cynical, and assume that these
instructions didn't work, and that Intel decided to remove them from
the spec rather than wait for another silicon pass.
Intel has never gone out of their way to let people know that these
instructions were dropped. Supposedly, everyone that purchased 386
chips got the errata sheet, and Intel notified the complier writers.
And no one programs in assembly language any more, right?
Michael Slater Editor and Publisher Microprocessor Report
550 California Ave., Suite 320, Palo Alto, CA 94306 415/494-2677
mslater@cup.portal.com sun!portal!cup.portal.com!mslaterberes@cadnetix.COM (Tim Beres) (07/19/88)
In article <7435@cup.portal.com> mslater@cup.portal.com writes: > >Intel has never gone out of their way to let people know that these >instructions were dropped. Supposedly, everyone that purchased 386 >chips got the errata sheet, and Intel notified the complier writers. >And no one programs in assembly language any more, right? > >Michael Slater Editor and Publisher Microprocessor Report >550 California Ave., Suite 320, Palo Alto, CA 94306 415/494-2677 >mslater@cup.portal.com sun!portal!cup.portal.com!mslater Oh contraire. Awhile back I was a H/A ATS (same thing as an Intel FAE) and attended many a training session locally and in Santa Clara. The '386 was extensively presented; we were told about the missing opcodes, and to pass along this to developers. Now, for this scenario to work, a couple things could happen: 1. A developer would ask Intel (or H/A) about the opcodes. They would be told about them. 2. We would volunteer the info to anyone we knew was doing '386 low-level development work. 3. If you were in the data base, you would get lit updates. So, the info was out there, if you asked. From my experience Intel was superb at getting FAE's and other support resources to engineers; they also had lots of data, though some of it was dated/incorrect/not current. What engineers had to realize, was that they had to call up Intel (or H/A or Pioneer or Arrow) and bug them about "xxxx". That was our job, to get info to people -- we were well trained and well paid to pass along the bits and pieces. This info was free, too (if you do development work and pay for data books, etc., boy are you dumb). The attitude that technical info will just come dropping into your lap really bugs me. Sometimes you have to make a phone call or check references, sometimes it does drop into your lap; in any event, lets stamp out this strain of RTFM-itis. Tim ..words to memorize words hypnotize words make my mouth exercise words all fail the magic prize... -- VF Tim Beres Cadnetix, 5775 Flatirons Pkwy, Boulder, CO 80301 beres@cadnetix.com {uunet,boulder,nbires}!cadnetix!beres
jja@tut.fi (Ahola Jari) (07/19/88)
In article <4814@killer.UUCP>, richardh@killer.UUCP (Richard Hargrove) writes: > > First, these mnemonics are not documented in Intel's _80386 Programmer's > Reference Manual_. I checked both chapter 17, "80386 Instruction Set", > and Appendix A, Opcode Map. So my question is: What opcodes are supposed to > be the correct ones for the above instructions? > Yes, I know that: These opcodes are mentioned on 386's datasheet dated may -86. The opcodes for these were: XBTS 0F A6 mod reg r/m (total 3 bytes)+ 2 (386 addr. mode) IBTS 0F A7 mod reg r/m -//- danno@microsof told me the following: (thanks to you danno) To: uunet!tut!jja Subject: Re: Raiders of the lost opcodes of the 80386 In-reply-to: your article <4071@korppi.tut.fi> I don't know Microsoft's position, but I know that Intel no longer supports the op-codes. It turns out that it is faster to do the same thing using the double-precision shift instructions. The technique is detailed in the "80386 Programmer's Manual", order number 230985-001. -jja -- Jari 'jja' Ahola | Tampere University of Technology, CS dept. Opiskelijankatu 16 A 12 | P.O. Box 527, 33101 Tampere, Finland 33720 Tampere | Tel (intl) 358 31 162708 (work)/358 31 174009 (home) Finland. Puh. 931-174009| Net address: jja@tut (UUCP) AHOLA@FINTUTA (BITNET)