[comp.sys.ibm.pc] 40 MHZ 286?

mark@intek01.UUCP (Mark McWiggins) (09/03/88)

John Dvorak's "Inside Track" column in the 9/27/88 PC Mag goes on
about some "Chang modification" of the 286 motherboard, yielding
ridiculous throughput.  Dvorak says he "saw this thing run, I tested
it, and it is *incredible* ... sells for $350 to $400 and delivers
over 5 [MIPS] performance using ... 200 nanosecond memory and no cache!"

Considering Dvorak's track record of rumor-mongering, I wouldn't take
this on faith, so: do any of you netlanders know anything about this?

Thanks in advance.
-- 

Mark McWiggins			UUCP:		uunet!intek01!mark
DISCLAIMER: I could be wrong.	INTERNET:	intek01!mark@uunet.uu.net
						(206) 455-9935

madd@bu-cs.BU.EDU (Jim Frost) (09/04/88)

In article <342@intek01.UUCP> mark@intek01.UUCP (Mark McWiggins) writes:
|John Dvorak's "Inside Track" column in the 9/27/88 PC Mag goes on
|about some "Chang modification" of the 286 motherboard, yielding
|ridiculous throughput.  Dvorak says he "saw this thing run, I tested
|it, and it is *incredible* ... sells for $350 to $400 and delivers
|over 5 [MIPS] performance using ... 200 nanosecond memory and no cache!"

He's probably completely out in left field.  I've heard rumors of
high-speed 286 chips (new design and/or new materials give much higher
speed ratings), so it's possible he's seen such a thing, but without a
cache I can't imagine how you'd get 5mips with 200ns chips, even
SRAMS.

jim frost
adt!madd@bu-it.bu.edu

rps@homxc.UUCP (R.SHARPLES) (09/07/88)

In article <24728@bu-cs.BU.EDU>, madd@bu-cs.BU.EDU (Jim Frost) writes:
> In article <342@intek01.UUCP> mark@intek01.UUCP (Mark McWiggins) writes:
> |John Dvorak's "Inside Track" column in the 9/27/88 PC Mag goes on
> |about some "Chang modification" of the 286 motherboard, yielding
> |ridiculous throughput.  Dvorak says he "saw this thing run, I tested
> |it, and it is *incredible* ... sells for $350 to $400 and delivers
> |over 5 [MIPS] performance using ... 200 nanosecond memory and no cache!"
> 
> He's probably completely out in left field.  I've heard rumors of
> high-speed 286 chips (new design and/or new materials give much higher
> speed ratings), so it's possible he's seen such a thing, but without a
> cache I can't imagine how you'd get 5mips with 200ns chips, even
> SRAMS.
> 
> jim frost
> adt!madd@bu-it.bu.edu

The gist of the "Chang modification", as described in Dvorak's article, was
that Chang accumulates machine instructions until he has a whole bunch
and then crams them through the CPU at a 40 Mhz rate.  He then lets the 
chip sit quiet for a while so it doesn't melt down.  The result of this
sprint-rest-sprint-rest-sprint approach, vs the normal jog-jog-jog approach,
is greater throughput.  I don't know if its true, but, for what its worth, 
that is approximately what Dvorak said.

Russ Sharples
homxc!rps

NOTE:

The above in NO WAY reflects the opinions of AT&T.
These opinions are my own and the results of un-scientific and 
highly irregular analysis methods.

berger@clio.las.uiuc.edu (09/07/88)

Not to mention, a 40 MHz clock requires a lot of radio-frequency
engineering.  

			Mike Berger
			Department of Statistics 
			Science, Technology, and Society
			University of Illinois 

			berger@clio.las.uiuc.edu
			{ihnp4 | convex | pur-ee}!uiucuxc!clio!berger

haugj@pigs.UUCP (The Beach Bum) (09/08/88)

In article <16800359@clio> berger@clio.las.uiuc.edu writes:
>Not to mention, a 40 MHz clock requires a lot of radio-frequency
>engineering.  

not true.  digital methods work very well at 40MHz.  lead length
becomes a factor and power requirements go up, but nothing
resembling "radio-frequency engineering".  fairchild Fast (74F)
series parts should handle the speed.  (probably even 74S as
well)  i don't know of any 80MHz shift registers or flip-flops
so getting a good clean 50% duty cycle is going to be a bitch,
but then you can always go 10K ECL for the clock and convert
back to TTL levels ;-)
-- 
=-=-=-=-=-=-=-The Beach Bum at The Big "D" Home for Wayward Hackers-=-=-=-=-=-=
               Very Long Address: John.F.Haugh@rpp386.dallas.tx.us
                         Very Short Address: jfh@rpp386
                           "ANSI C: Just say no" -- Me

james@bigtex.uucp (James Van Artsdalen) (09/09/88)

In article <3333@homxc.UUCP>, rps@homxc.UUCP (R.SHARPLES) wrote:

> [...] Chang accumulates machine instructions until he has a whole bunch
> and then crams them through the CPU at a 40 Mhz rate.  He then lets the 
> chip sit quiet for a while so it doesn't melt down. [...]

Heat is not the only problem, and it can be a lot more subtle than
just "melting down".  Both the Intel 386 problem and the AMD 286
problem are temperature-induced failures that are intermittent in the
production sense (ie, not all chips experience the failure mode).
This is probably one of those things that sounds really neat on paper,
but never really works right in the real world...
-- 
James R. Van Artsdalen    ...!uunet!utastro!bigtex!james     "Live Free or Die"
Home: 512-346-2444 Work: 328-0282; 110 Wild Basin Rd. Ste #230, Austin TX 78746

ray@micomvax.UUCP (Ray Dunn) (09/15/88)

In article <397@pigs.UUCP> haugj@pigs.UUCP (The Beach Bum) writes:
>In article <16800359@clio> berger@clio.las.uiuc.edu writes:
>>Not to mention, a 40 MHz clock requires a lot of radio-frequency
>>engineering.  
>
>not true.  digital methods work very well at 40MHz.  lead length
>becomes a factor and power requirements go up, but nothing
>resembling "radio-frequency engineering"....

There are more things in heaven and earth.....

I know it's very difficult for him, but perhaps The Bum should *really*
try to assume that there might just *possibly* be something in what others
say before he jumps to his terminal and puts his foot in it.

As the frequency increases, meeting FCC, FTZ and other classification
standards in Radio Frequency Interference becomes more and more difficult.

At 20 Mhz it is a bitch, at 40 Mhz, meeting FCC class B will require as much
specialized engineering work in PCB layout techniques and housing design etc
as does the digital design.  Probably more.

Have a look inside some boxes, PS/2's do a beautiful job in ant-EMI
engineering, particularly the 70's and 80's.

I'm inclined to give berger@clio the benefit of the doubt and assume that
this is what he was referring to.  Aren't you?

-- 
Ray Dunn.                      |   UUCP: ..!philabs!micomvax!ray
Philips Electronics Ltd.       |   TEL : (514) 744-8200   Ext: 2347
600 Dr Frederik Philips Blvd   |   FAX : (514) 744-6455
St Laurent. Quebec.  H4M 2S9   |   TLX : 05-824090

johne@hpvcla.HP.COM (John Eaton) (09/19/88)

<<<>
>not true.  digital methods work very well at 40MHz.  lead length
>becomes a factor and power requirements go up, but nothing
>resembling "radio-frequency engineering".
----------
 40 MHZ is in the VHF band and is above the 30 Mhz limit where Class B 
 radiated begins. The biggest problem in passing FCC is not the fundamental
 but the harmonics of the clock, you can easily see the first twenty clock
 harmonics from a digital clock. EMI protection is becoming more and more
 important in product design.
 
 
 John Eaton
 !hpvcla!johne

haugj@pigs.UUCP (John F. Haugh II) (09/19/88)

In article <1274@micomvax.UUCP> ray@micomvax.UUCP (Ray Dunn) writes:
>I know it's very difficult for him, but perhaps The Bum should *really*
>try to assume that there might just *possibly* be something in what others
>say before he jumps to his terminal and puts his foot in it.

thanks ray.  i have'nt received a personal attack from you on the net
since i abandoned soc.all.  nice to see you come out of your closet
from time to time to insult readers in the rest of the newsgroups.

>As the frequency increases, meeting FCC, FTZ and other classification
>standards in Radio Frequency Interference becomes more and more difficult.

that wasn't the topic of discussion.  there was nothing in berger's
article about meeting fcc standards.  the discussion revolved about
digital logic at 40MHz.

>Have a look inside some boxes, PS/2's do a beautiful job in ant-EMI
>engineering, particularly the 70's and 80's.

yes, i have looked.  multi-layer pcb's, metallic paint, wire mesh,
etc., etc.  real good work.  but it doesn't have one thing to do with
clocking a cpu at 40MHz.

>I'm inclined to give berger@clio the benefit of the doubt and assume that
>this is what he was referring to.  Aren't you?

no.  because he didn't state that he was referring to building a cabinet
to hold the sucker.  [ not to discount the pcb design problems, but you
are still going to have a considerable RF signal coming off the board
even with excellent pcb design ]
-- 
=-=-=-=-=-=-=-The Beach Bum at The Big "D" Home for Wayward Hackers-=-=-=-=-=-=
               Very Long Address: John.F.Haugh@rpp386.dallas.tx.us
                         Very Short Address: jfh@rpp386
                           "ANSI C: Just say no" -- Me

network@hgcvax.uucp (craig chaiken) (10/12/88)

     I read about the Tienwei 40-MHz Intel 80286 motherboard in John Dvorak's
Viewpoint column in the Sept. 27, 1988 issue of PC Magazine.  I was wondering
if anyone has read any articles that shed more light on this subject.


Craig Chaiken
Hartford Graduate Center
Computing Services

hd@kappa.rice.edu (Hubert D.) (10/14/88)

I also read the column in PC mag.  My intuitive analysis is that
he is using the prefetch queue to get his speedup.  The article
points out that this modification only works on the Harris version
of the 286.  the Harris chip is a cmos version of the processor.  It
has the distinct advantage of being totally static.  The internal
registers are not being refreshed (like dynamic ram).

The use of the cmos 286 and a very clever external circuit allows
them to switch between 40Mhz (while executing instructions in the
prefetch queue) and 12Mhz (while doing memory I/O).  

The best short description we've come up with is "bursty" mode to
describe the clock switching processor. \

Note: the processor doesn't melt because it is given the chance to
cool off whenever the processor needs info from ram.

These are my own thoughts based upon the sketchy details presented
in the article.

Hubert Daugherty
hd@rice.edu

schuster@dasys1.UUCP (Michael Schuster) (10/15/88)

In article <670@hgcvax.uucp> network@hgcvax.uucp (craig chaiken) writes:
>     I read about the Tienwei 40-MHz Intel 80286 motherboard in John Dvorak's
>Viewpoint column in the Sept. 27, 1988 issue of PC Magazine.  I was wondering
>if anyone has read any articles that shed more light on this subject.

It's a hoax.
They slowed down the timers on a 10 mHz AT board to make it look as
though it was running speed programs at quadruple speed. The
current scuttlebut is that there is no "40 mHz Chang modification".
You want gold from lead?

---------
-- 
l\  /l'   _  Mike Schuster          ...!dasys1!schuster
l \/ lll/(_  Big Electric Cat       schuster@dasys1.UUCP
l    lll\(_  New York, NY USA       DELPHI,GEnie:MSCHUSTER  CIS:70346,1745 

bright@Data-IO.COM (Walter Bright) (10/18/88)

In article <6959@dasys1.UUCP> schuster@dasys1.UUCP (Michael Schuster) writes:
>They slowed down the timers on a 10 mHz AT board to make it look as
>though it was running speed programs at quadruple speed. The
>current scuttlebut is that there is no "40 mHz Chang modification".

A friend of mine had a PC clone once that had a great Norton SI rating.
After a while, he discovered that the reason for it was that the clone
manufacturer had put in a 'slow' clock! Moral: before believing results
based on the system clock, do a reality check with your watch!

(No, I don't remember the manufacturer. It was an off-brand, though,
and very cheap.)

del@Data-IO.COM (Erik Lindberg) (10/20/88)

In article <6959@dasys1.UUCP> schuster@dasys1.UUCP (Michael Schuster) writes:
>In article <670@hgcvax.uucp> network@hgcvax.uucp (craig chaiken) writes:
>>     I read about the Tienwei 40-MHz Intel 80286 motherboard in John Dvorak's
>>Viewpoint column in the Sept. 27, 1988 issue of PC Magazine.  I was wondering
>>if anyone has read any articles that shed more light on this subject.
>
>It's a hoax.
>They slowed down the timers on a 10 mHz AT board to make it look as
>though it was running speed programs at quadruple speed. The
>current scuttlebut is that there is no "40 mHz Chang modification".
>You want gold from lead?
>

Interesting. That reminds me of a local company here in Seattle that, for
a while, was selling a machine called the "AT-Light" (sort of like a Miller
Lite?) which actually contained an 8088 CPU. Apart from the misleading
name, they claimed it had a "turbo mode" activated with the usual
<alt><gray-minus> where Norton SI would get 2.7 rating. When I got mine home,
it just didn't *seem* to go as fast as my other turbo-xt system. The stop
watch confirmed this, regardless of what every benchmark I had reported.
Opening the case revealed the machine ran at a standard 4.77 Mhz, and pressing
<alt><gray-minus> did nothing but re-initialize the system timer to give
false elapsed-time readings. I wanted to report them for blatant consumer
fraud, but can you imagine trying to explain such a technical fraud to
someone in the Att. Gen. office? (2 years ago besides!)

-- 
del (Erik Lindberg) 
uw-beaver!tikal!pilchuck!del