[comp.sys.ibm.pc] Precise loop timing on PC?

dclaar@hpcupt1.HP.COM (Doug Claar) (02/08/89)

This has probably been discussed before, but is it possible for the PC
to execute something precisely and repeatedly, at or near the clock
speed? I have a little 75 clock loop that I would like to take 75
clocks EVERY time...no interrupts. It is important that the I/O port
referenced is accessed in uniform time slices. I tried doing a CLI
and also setting bit 7 of port 0A0H and 070H (I saw differing docs
on which one was supposed to control NMI), but these steps didn't
help. Can this be done?


Thanks,

Doug Claar
HP Computer Systems Division
UUCP: mcvax!decvax!hplabs!hpda!dclaar -or- ucbvax!hpda!dclaar
ARPA: dclaar%hpda@hplabs.HP.COM

dclaar@hpcupt1.HP.COM (Doug Claar) (02/10/89)

I received mail that indicated that DRAM refresh and the pre-fetch 
queue make this difficult to do. Another reply suggested polling the
timer, but that would seem to slow down the loop. One variation on
this that I thought of (well, actually, basic does something like 
this) is to grab the timer interrupt and boost the timer rate. I 
would then call the real timer interrupt every N times the timer
ticks, where N is how much faster my new timer is going.

old timer: _________|_________|_________|_________|_________|_________|
 
new timer: _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|
 
counter:            5 4 3 2 1 0
 
timer code:
   do my stuff;
   decrement counter;
   if counter = 0
      call old timer
      set counter to 5
   end

Doug Claar
HP Computer Systems Division
UUCP: mcvax!decvax!hplabs!hpda!dclaar -or- ucbvax!hpda!dclaar
ARPA: dclaar%hpda@hplabs.HP.COM

orn@rsp.is (Orn E. Hansen) (02/11/89)

In article <5930024@hpcupt1.HP.COM>, dclaar@hpcupt1.HP.COM (Doug Claar) writes:
> This has probably been discussed before, but is it possible for the PC
> to execute something precisely and repeatedly, at or near the clock
> speed? I have a little 75 clock loop that I would like to take 75
> clocks EVERY time...no interrupts. It is important that the I/O port
> referenced is accessed in uniform time slices. I tried doing a CLI
> and also setting bit 7 of port 0A0H and 070H (I saw differing docs
> on which one was supposed to control NMI), but these steps didn't
> help. Can this be done?

NMI stands for Non Maskable Interrupt, and as the name implies this
actually cannot be masked.  The system uses NMI for Parity Check
and that can be masked with $A0.  So, if Shadowed Interrupts occurr
on the NMI Line, you can not mask them out.

Have you tried to mask out interrupts on the 8259A Controller???