kemp@umn-cs.CS.UMN.EDU (Stuart R. Kemp) (05/20/89)
For writing modes, all operations take place on the byte that
is currently in the latch (at least, I think so! If this is indeed
the case, then in order to alter a pixel/byte, it must first be
read, then written).
Have 3 write modes:
0 - Copies CPU byte to all bytes and planes
Bit- and map-mask effective
1 - Latch copied to specific address
2 - Only low 4 bits of CPU byte used; one bit copied to
each plane; bit- and map-mask effective
Set Write Mode
port[0x3CE] := 5
port[0x3CF] := Mode
Set Bit Mask
port[0x3CE] := 8
port[0x3CF] := Mask
Mask: 0 -> bit (pixel) not affected
1 -> Affected
Set Map Mask
port[0x3C4] := 2;
port[0x3C5] := Planes to use (15 -> all planes)
Data Rotate Register
port[0x3CE] := 0
port[0x3CF] := Value
Value:
Bits
2-0 Rotate count
4-3 00 - Data unmodified
01 - Data ANDed with latch
10 - ORed
11 - XORed
7-5 Unused
For Reading
Mode 0 - Returns byte from any one of bit planes
1 - Searches for specific color code
Returns byte; bit == 1 -> color found
Set Mode
port[0x3CE] = 5
port[0x3CF] = Mode
for mode 0: must set map-select register
port[0x3CE] = 4; port[0x3CF] = 0..3
mode 1: port[0x3CE] = 2; port[0x3CF] = Value (low 4 bits)
Can also set don't-care-register
0-> ignore match
1-> enforce match
port[0x3CE] = 7
port[0x3CF] = Value
Some of this stuff may seem a little cryptic; I copied it out
of a book quite a while back. I have used the Write Modes, and
will shortly experiment with the Read Modes.
If anyone else has anything to add (or correct), either post it,
or mail it to me, and I will collect all info, and post again
later. There are also port addresses and functions which pertain
specifically to the VGA. If anyone knows anything about these,
please also post/email to me.
-Stuart Kemp kemp@umn-cs.cs.umn.edu