alun@neabbs.UUCP (ALUN SAUNDERS) (06/02/89)
Can anyone tell me what happens to memory on 8-bit PC/XT add-on cards installed in a 286 or 386 machine, say video RAM, when that machine is running in protected mode ? Since the card is only seeing the bottom 20 bits of the 24 address lines, won't the offending lump of memory appear all over the memory map at 1Mbyte intervals and cause address conflicts ? This question came up in connection with a problem a colleague of mine has adressing an encryption card under XENIX-386, but I would have thought OS/2 would have the same problem. Please excuse me if this is a silly question, or has been asked before, but its been bugging me for a day or two. Alun Saunders NEABBS Amsterdam Holland
phil@diablo.amd.com (Phil Ngai) (06/06/89)
In article <158322@neabbs.UUCP> alun@neabbs.UUCP (ALUN SAUNDERS) writes: |Can anyone tell me what happens to memory on 8-bit PC/XT add-on cards |installed in a 286 or 386 machine, say video RAM, when that machine is |running in protected mode ? Since the card is only seeing the bottom |20 bits of the 24 address lines, won't the offending lump of memory No, IBM recognized this possible compatibility problem and defined new memory read and write lines on the second connector for access to the 16 megs. The old read and write lines only go active for the bottom one meg. -- Phil Ngai, phil@diablo.amd.com {uunet,decwrl,ucbvax}!amdcad!phil "The government is not your mother."
rob@conexch.UUCP (Robert Collins) (06/06/89)
In article <158322@neabbs.UUCP> alun@neabbs.UUCP (ALUN SAUNDERS) writes: >Can anyone tell me what happens to memory on 8-bit PC/XT add-on cards >installed in a 286 or 386 machine, say video RAM, when that machine is >running in protected mode ? Since the card is only seeing the bottom >20 bits of the 24 address lines, won't the offending lump of memory >appear all over the ........ Suppose you want to address video ram @ B800:0 What happens in 20 bit addresses? The CPU takes the segment, shifts left 4 and adds the offset. Then uses the result to strobe the address lines. Note that since B8000 is below 1M only 20 address lines are needed. Now, do the same thing on a 286 (not in proteced mode). The only difference is that 24 address lines get strobed. What is the value of lines 20-23? 0. Now go to proteced mode. I can only assume you know how addressing works in proteced mode, so I will not give the long winded explanation. You segment register is a pointer to a table that has the actual address in it. If that segment selector points to a table entry that has address B8000 as its address, all 24 address lines get strobed at you write to B8000. What is the value of A20-A23? 0 (still). So your question really becomes quite simple: Does video (or any RAM) below 1M work on a 286? The answer is an obvious yes. It doesn't matter that you only have 20 address lines on your card when A20-A23 are 0 anyways. -- "Worship the Lord your God, and serve him only." Mat. 4:10 Robert Collins UUCP: ucbvax!ucivax!icnvax!conexch!rob HOMENET: (805) 523-3205 UUCP: uunet!ccicpg!turnkey!conexch!rob WORKNET: (805) 378-7901
ballou@chalk.dec.com (Ken Ballou) (06/08/89)
In article <30483@conexch.UUCP>, rob@conexch.UUCP (Robert Collins) writes: > So your question really becomes quite simple: Does video (or any RAM) > below 1M work on a 286? I'm sorry, but I'm a bit confused. (Of course, that is hardly news! :-) I thought the original question was something along this idea: Suppose I create a segment whose base address is 180000H. Now, when I access this segment, address line A20 will carry a 1. However, as you point out: > The answer is an obvious yes. It doesn't > matter that you only have 20 address lines on your card when A20-A23 > are 0 anyways. Now, specifically since the card only has 20 address lines, won't it ignore A20 being 1? If so, then it would see 8xxxxH on the low address lines. Wouldn't it then say "Aha, you're talking to ME!" and try to respond? So, as the original question put it, wouldn't you have video RAM appearing at 080000H, 180000H, 280000H, and so on? -- Kenneth Ballou Digital Equipment Corp. (UUCP) ...!decwrl!pool.dec!ballou (ARPA) ballou%pool.dec@decwrl.dec.com
phil@diablo.amd.com (Phil Ngai) (06/08/89)
In article <30483@conexch.UUCP> rob@conexch.UUCP (Robert Collins) writes: |In article <158322@neabbs.UUCP> alun@neabbs.UUCP (ALUN SAUNDERS) writes: |>Can anyone tell me what happens to memory on 8-bit PC/XT add-on cards |>installed in a 286 or 386 machine, say video RAM, when that machine is |>running in protected mode ? Since the card is only seeing the bottom |>20 bits of the 24 address lines, won't the offending lump of memory |>appear all over the ........ | |So your question really becomes quite simple: Does video (or any RAM) |below 1M work on a 286? The answer is an obvious yes. It doesn't |matter that you only have 20 address lines on your card when A20-A23 |are 0 anyways. Try reading the question, fella. Alun wants to know how the card can tell A20-23 is NOT 0 when it's not connected to A20-23. Let's hope you're not in charge of developing software or any other task where you have to understand what an address space is. -- Phil Ngai, phil@diablo.amd.com {uunet,decwrl,ucbvax}!amdcad!phil "The government is not your mother."
Ralf.Brown@B.GP.CS.CMU.EDU (06/08/89)
In article <1235@hiatus.dec.com>, ballou@chalk.dec.com (Ken Ballou) writes: }In article <30483@conexch.UUCP>, rob@conexch.UUCP (Robert Collins) writes: }> So your question really becomes quite simple: Does video (or any RAM) }> below 1M work on a 286? } }Suppose I create a segment whose base address is 180000H. Now, when I access }this segment, address line A20 will carry a 1. However, as you point out: } }> The answer is an obvious yes. It doesn't }> matter that you only have 20 address lines on your card when A20-A23 }> are 0 anyways. } }Now, specifically since the card only has 20 address lines, won't it ignore A20 }being 1? If so, then it would see 8xxxxH on the low address lines. Wouldn't it }then say "Aha, you're talking to ME!" and try to respond? So, as the original }question put it, wouldn't you have video RAM appearing at 080000H, 180000H, }280000H, and so on? In order for the card to say "Aha, you're talking to ME!", not only must the address be on the bus, but the MEMR or MEMW line must be pulled to active (since the address could be an I/O port, in which case either IOR or IOW is made active). In the AT, the MEMR and MEMW lines on the original 8-bit connector are only activated for memory accesses where the high four bits (A20 to A23) are all zero. If any of those lines are 1, then a second set of MEMR and MEMW lines on the second, 16-bit, connector are activated instead. Thus, an 8-bit card never sees addresses above 1M, since it never gets a read or a write signal. Kludgy, but it works.... -- UUCP: {ucbvax,harvard}!cs.cmu.edu!ralf -=-=-=- Voice: (412) 268-3053 (school) ARPA: ralf@cs.cmu.edu BIT: ralf%cs.cmu.edu@CMUCCVMA FIDO: Ralf Brown 1:129/31 Disclaimer? I claimed something? Intelligence is when you spot a flaw in your boss's reasoning. Wisdom is when you refrain from pointing it out. --James Dent
boyne@hplvli.HP.COM (Art Boyne) (06/08/89)
ballou@chalk.dec.com (Ken Ballou) writes: > Now, specifically since the card only has 20 address lines, won't it ignore A20 > being 1? If so, then it would see 8xxxxH on the low address lines. Wouldn't it > then say "Aha, you're talking to ME!" and try to respond? So, as the original > question put it, wouldn't you have video RAM appearing at 080000H, 180000H, 280000H, and so on? No! Phil Ngai, in his reponse, gave the correct, but terse answer. Here is a more detailed version: The XT has a single connector for plug-in cards. Included among others on this connector are A19-A0 and the \MEMR and \MEMW (memory read/write) strobes. On the AT, the \MEMR and \MEMW are renamed \SMEMR and \SMEMW, and the second connector has A23-A20 and a new \MEMR and \MEMW. On an access to an address < 1M, all 24 address bits are driven (obviously, A23-A20 are all 0), and both \SMEMx and \SMEMx (x=R or W as appropriate) are asserted. Therefore both 8-bit and 16-bit cards will respond, 8-bit cards looking at the \SMEMx strobe, 16-bit cards the \MEMx strobe. On accesses to addresses >1M, only \MEMx is driven. The 8-bit cards therefore don't even know that an access is occurring, and don't respond; only the 16-bit cards, which decode all 24 address bits, respond. Therefore, no problems. Art Boyne, boyne@hplvla.hp.com
mms00786@uxa.cso.uiuc.edu (06/11/89)
Hello Hardware Experts: I am a summer intern designing an I/O card for the AT. In other words, I am supposed to respond to the -IOW and -IOR signals. In looking through the IBM AT Hardware Tech. manual, I noticed that in their Prototype board, they decode only A0 through A9 (for a total of 1K io channels). But I am under the impression that the '286 (and the 8086, 8088 etc) all have a possible 64K of IO space. So, why don't they decode all 16 lines A0 through A15? Their IO space map also covered only the bottom 1K of IO space, so I am working under the assumption that there is some sort of gentleman's agreement not to use space above that, or their bus controller generates IOW and IOR only for the bottom 1K. Hope I am assuming right. I start building the board Monday, so any response will be greatly appreciated. Thank You, Milan. mms00786@uxa.cso.uiuc.edu .
phil@diablo.amd.com (Phil Ngai) (06/13/89)
In article <111700101@uxa.cso.uiuc.edu> mms00786@uxa.cso.uiuc.edu writes: |I am a summer intern designing an I/O card for the AT. In other words, I am |supposed to respond to the -IOW and -IOR signals. In looking through the |IBM AT Hardware Tech. manual, I noticed that in their Prototype board, they |decode only A0 through A9 (for a total of 1K io channels). But I am under the |impression that the '286 (and the 8086, 8088 etc) all have a possible 64K of |IO space. This is true, the iAPX family have a possible 64K of IO space. However, on the PC bus this space is not available in a straightforward way. |their bus controller generates IOW and IOR only for the bottom |1K. No, this is not the case. The motherboard has IO devices on it and they are only decoded within a 1 Kbyte range. (think about the implications of this) If you happen to need a big chunk of address space, then you can get it by decoding the address lines above 1Kbyte and making addresses that appear "aliased" to the motherboard actually unique. Here's an example. Assume you need 256 bytes or so of IO registers. You can't get a chunk of 256 contiguous bytes between 0 and 0x3ff. Pick a range of 256/(64K/1K) = four bytes within that range, say from 300 to 303. Build your logic to respond to 300-303*(n*400). This will give you 256 bytes in a weird way, but this is how you have to do it on the PC bus. I'll list the first few addresses assuming a base of 300: 300 301 302 303 700 701 702 703 a00 a01 a02 a03 ... Why this works, the implications, and how to write software for it are left up to the reader. Here's a important hint to hardware hackers: the amount of delay through your ready logic is VERY important in some clones, if you need wait states. I have found some clones that only worked with ONE PAL delay and failed with just TWO! -- Phil Ngai, phil@diablo.amd.com {uunet,decwrl,ucbvax}!amdcad!phil "The government is not your mother."
phil@diablo.amd.com (Phil Ngai) (06/13/89)
In article <25937@amdcad.AMD.COM> phil@diablo.AMD.COM (Phil Ngai) writes: |a00 |a01 |a02 |a03 Uh, make that b00,b01,b02, and b03. Sorry. -- Phil Ngai, phil@diablo.amd.com {uunet,decwrl,ucbvax}!amdcad!phil "The government is not your mother."
mms00786@uxa.cso.uiuc.edu (06/14/89)
Gottcha! Milan mms00786@uxa.cso.uiuc.edu