lever@linus.UUCP (Mark J. Lever) (06/24/89)
Hi, I've been pondering the question of wait states and memory recently and I think I need help from the net experts. I am trying to figure out how fast memory needs to be to be truly "0" wait state. On a 25 MHz machine, the processor cycle time is 40 ns. How many of these cycle times is necessary to perform a read or a write from or to memory? Do most motherboards operate the same when accessing memory? How effective are caches? What are some of the hit ratios when running things like dBase or Lotus? Are the caches in PCs direct mapped, set associative or fully associative? How does page interleaving work and how effective is it? All responses are welcome especially ones explaining the timing (address to data valid time, data setup time, ...) Thanks, Mark (lever@linus.uucp)