[comp.sys.ibm.pc] CPU Identification 3 of 4

mshiels@tmsoft.uucp (Michael A. Shiels) (08/16/89)

Article 17981 of comp.sys.ibm.pc:
Path: watmath!looking!brad
From: brad@looking.UUCP (Brad Templeton)
Newsgroups: comp.sys.ibm.pc
Subject: Re: How to tell the difference between 80386 virtual 8086 mode and 286 real mode?
Message-ID: <1884@looking.UUCP>
Date: 30 Jul 88 16:56:17 GMT
References: <1873@looking.UUCP> <1657@microsoft.UUCP>
Reply-To: brad@looking.UUCP (Brad Templeton)
Organization: Looking Glass Software Ltd.
Lines: 49

> use SMSW

This does sound like a good method.  Another method, which I developed
on my own while waiting for replies, was to examine the length of the
instruction prefetch queue.   This can even tell the difference between
an 8088 and and 8086 if you want it to.  (8088 = 4, 8086,286 = 6, 386 = 8)

But that does sound like a rather scary way to do things, since Intel is
certainly free to change the length of this in future chips, or to put
in impure code checking into the prefetch hardware.

For those who want it,...

prefcount	PROC	NEAR
		; must preserve ax.  It does
		mov	bx,offset point
		mov	cx,0
		mov	dx,12		; max iter
	kloop:
		nop
		nop
		; store "inc cx" at one of the nops
		mov	byte ptr cs:[bx],41h		; inc cx
	point:
		; execute a chain of nops, one that might be the "inc cx"
		REPT	12
		nop
		ENDM
		; restore the "inc cx" back to a nop
		mov	byte ptr cs:[bx],90h		; nop
		; go on to the next byte
		inc	bx
		; check we haven't gone too far
		dec	dx
		jz	pcdone
		; keep looping until the inc was interpreted
		jcxz	kloop
	 pcdone:
		; we already have the index of the first non-prefetched
		; byte plus one (we incremented anyway).  Now we use
		; point-1 to add another to it because of the three byte
		; instruction at the front
		; the result is 6 for 286 and 8 for 386. (4 for 8088)
		sub	bx,offset point-1
		ret
prefcount	ENDP

-- 
Brad Templeton, Looking Glass Software Ltd.  --  Waterloo, Ontario 519/884-7473