esker@abaa.uucp (Lawrence Esker) (08/22/89)
Our company is implementing communication networks on interchangeable plugs.
These plugs use a dual port ram to a host processor. It can be 8 bit wide
data or 16 bit wide data depending on the complexity of the network.
We have completed our first plug using an 8 bit wide data path. We used an
IBM AT as our test host medium and the platform to devolop a host software
toolkit. The interface between the plug dual port RAM and the IBM backplane
was fairly trivial and worked fine.
Now the problem: We are starting the first of the plugs that use a 16 bit
wide data path. The engineer responsible for designing the interface to the
IBM backplane just reported in today's project meeting that it is impossible
to do 16 bit wide accesses on the backplane to a device that requires a
variable and sometimes large number of wait states. He said that 16 bit
accesses are forced to 1 wait state and anything he's tried doesn't work.
I find this hard to believe and have been asked to help with a solution.
Since I have never designed to an IBM AT backplane before, I figured I would
start with net land. Has anyone ever designed an arbitrated memory system,
using variable number of wait cycles to the IBM AT backplane? This memory
can be up to 512 kBytes. If so, what is the key to making it work?
Please reply via email, I do not usually read this news group. Be as technical
as you need be and refer to the IBM hardware manual if necessary. (Don't
worry, I can keep up. :-) If I get some good or novel approaches, I will post
a summary. (If you do post a response, keep the same subject line so I have
something to search for.)
Thanks in advance for your help!
--
---------- Lawrence W. Esker ---------- Definition: FROWN
\ * * * ******* / A smile with a hang-over.
\ * * * * * /
\ * * * * * ***** / Sr. Hardware/ASIC Design Engineer
\ * * * * * * / Allen-Bradley Communications Div.
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