les@uwovax.uwo.ca (10/17/89)
I have a 286 clone with a 80286-10 processor running at a clock speed of 12MHz. Running the Landmark Speed Test indicates that its equivalent to a IBM AT running at 16MHz! Why? How does it get the extra thoughput, or can a processor 'fool' a performance tester? I also get interesting results when measuring Dhrystones against a 386SX. The 286 measurement is 3,034 Dhrystones, while the 386SX at 16MHz is only 2,845. The measurement software in this case is called QAPLUS. Can these measurements be trusted? --- Les Flodrowski CA: les@vaxi.uwo.CA Social Science Computing Laboratory Bitnet: les@uwovax.BITNET University of Western Ontario UUCP: les@julian.UUCP London, Ontario, Canada, N6A 5C2 (...!watmath!julian..)
halliday@cheddar.cc.ubc.ca (Laura Halliday) (10/18/89)
In article <3931.253b0031@uwovax.uwo.ca> les@uwovax.uwo.ca writes: > >Can these measurements be trusted? What you are measuring is how well your computer runs benchmarks. This may or may not have anything to do with how well your computer will perform on the tasks you actually use it for. With the obsession for ever higher benchmark numbers, if I was writing a compiler (for example), I'd make sure it did well on the standard benchmarks. It might end up performing well on other programs, too... >Les Flodrowski CA: les@vaxi.uwo.CA ...laura
dougm@palomar.SanDiego.NCR.COM (Doug Marshall) (10/18/89)
In article <3931.253b0031@uwovax.uwo.ca> les@uwovax.uwo.ca writes: > > I have a 286 clone with a 80286-10 processor running at a clock speed of >12MHz. Running the Landmark Speed Test indicates that its equivalent to a >IBM AT running at 16MHz! Why? How does it get the extra thoughput, or can >a processor 'fool' a performance tester? > From what I understand, it has to do with the number of wait states of your memory. I venture to guess that you have 100ns chips installed and also have 0 wait states. This means (I think) that data is available without waiting an additional cycle for setup to occur. A guess on my part is that the standard bus definition has one wait state for memory accesses. That's my opinion, for what it's worth. ---- Doug Marshall <Doug.Marshall@SanDiego.NCR.COM> +1 619 485 3494 <...!ncr-sd!palomar!dougm> "All of us is smarter than each of us!"
blitter@ele.tue.nl (Paul Derks) (10/19/89)
In article <3931.253b0031@uwovax.uwo.ca> les@uwovax.uwo.ca writes: > > I have a 286 clone with a 80286-10 processor running at a clock speed of >12MHz. Running the Landmark Speed Test indicates that its equivalent to a >IBM AT running at 16MHz! Why? How does it get the extra thoughput, or can >a processor 'fool' a performance tester? > > I also get interesting results when measuring Dhrystones against a 386SX. >The 286 measurement is 3,034 Dhrystones, while the 386SX at 16MHz is only >2,845. The measurement software in this case is called QAPLUS. On the screen of Landmark it says: This system is running as an IBM AT at ?? Mhz. The original AT has 1 waitstate on all memory accesses. This means that a system running at 12 Mhz 0 waitstates executes software as fast as an 16 MHz system with 1 wait state. I don't know QAPLUS but if the SX runs at 16 MHz 1 wait state the results make sense. However the SX can run 32 bits software and is much faster than a 286 in that mode. Processor frequency alone says NOTHING! The memory system makes all the difference. You should ask questions like: How fast are the RAM chips, 120 ns, 100 ns or 80 ns. Is the memory interleaved, is there a cache? etc. So, at first glance the results look resonably. Paul Derks
wayne.ho@f526.n250.z1.fidonet.org (wayne ho) (10/25/89)
> Is the memory interleaved, is > there a cache? etc. > Hello there, I'm just wondering.. when one turns on memory interleaving does this increase the performance of the computer or does it allow for slower RAM chips and give you 0 wait states. I have a 286 NEAT chipset board and have 80ns chips installed. When I install memory interleaving the benchmarks seem to be a bit slower. Does this make sense? Wayne --- ConfMail V3.31 * Origin: MeTaStAsIo'S -`Not ready error reading drive A' (416)487-9093 (1:250/526)
hakme@latcs1.oz (Dennis Hakme) (10/29/89)
In article <89102623321592@masnet.uucp> wayne.ho@f526.n250.z1.fidonet.org (wayne ho) writes: > >Hello there, > I'm just wondering.. when one turns on memory interleaving does > >this increase the performance of the computer or does it allow for >slower RAM chips and give you 0 wait states. I have a 286 NEAT chipset >board and have 80ns chips installed. When I install memory interleaving >the benchmarks seem to be a bit slower. Does this make sense? > > Wayne > I have a 16MHz NEAT which uses 100ns Ram and has the AMI bios. I always use interleaving and 0-wait because it is DEFINITELY faster than Normal mode 1-wait state. With the interleaving set the computer actually runs at an average of 0.7 wait states which makes it slightly faster than 1-wait. The only reason that the non-interleave mode with 1-wait state is offered is because you can only have interleaving when you have an even number of memory banks with the same type of ram chips. I don't know what benchmarks you have been using but all the ones I have tried verify the above. Dennis Hakme
wayne.ho@f526.n250.z1.fidonet.org (wayne ho) (11/02/89)
> interleaving and 0-wait because it is DEFINITELY faster > than Normal mode 1-wait state. > With the interleaving set the computer actually runs at > an average of 0.7 > wait states which makes it slightly faster than 1-wait. Hi, I think I may understand the what is going on now. I think the interleaving allows for almost 0 wait state operation on the computer with RAM chips which are slower. Because I have RAM which is fast enough to run 0 wait states, non-interleaved (I suppose true 0 wait state.. not .7 wait states) it will be faster than interleaving the RAM. This is my educated guess. Wayne --- ConfMail V3.31 * Origin: MeTaStAsIo'S -`Not ready error reading drive A' (416)487-9093 (1:250/526)
davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) (11/04/89)
In article <89110221162151@masnet.uucp>, wayne.ho@f526.n250.z1.fidonet.org (wayne ho) writes: | Because I have RAM which is fast | enough to run 0 wait states, non-interleaved (I suppose true 0 wait | state.. not .7 wait states) it will be faster than interleaving the | RAM. This is my educated guess. Remember that access time and cycle time are involved here. Access time is the time to get data from a memory. Cycle time is the time to get the *next* access. Most DRAM has a cycle time longer than the access time, while for static RAM they are the same. Not all memory rated at 60ns can be accessed EVERY 60ns. This doesn't mean that your chips won't do what you expect, but that you and other users should realize that interleave is designed to avoid just this problem. When I last had a look at real data (measured by a competent user), 100ns chips typically could only go 140-160ns cycles time. If someone has more recent data I would like to see it, mine is back from the days when 100ns was hot stuff. -- bill davidsen (davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen) "The world is filled with fools. They blindly follow their so-called 'reason' in the face of the church and common sense. Any fool can see that the world is flat!" - anon