[comp.sys.ibm.pc] 512K VGA Programming

roskos@IDA.ORG (Eric Roskos) (01/07/90)

Does anyone have experience with writing to a 512K VGA in the 8-bit
pixel modes?

Clearly you can't just write to it sequentially like in mode 13H, since
there isn't enough of the address space available.  But I don't see any
sort of "bank switching" register on the VGA (at least, not in the
Ferraro text). 

I thought maybe it could be done by turning off the Chain Four (C4) bit
(bit 3 of sequencer register 4), then writing to it in write mode 0 by
selecting the appropriate memory plane with the map mask register.  But
when I do this in mode 13H as a test, it behaves very strangely.  Pixels
0-3 (the ones at address A000:0000) work as one would expect.  Then
pixels 4-15 (at addresses A000:0001 through A000:0003) don't display at
all.  Pixels 16-19 display, but immediately adjacent to pixels 0-3 on
the scan line.  This pattern repeats until pixels 48-51: pixels 48 and
49 display immediately following pixel 35 (as in the original pattern),
but then pixel 50 displays about 1/4 a scan line to the right of pixel
49, and pixels 50-53 all display.  Then it resumes the old pattern
again, displaying pixels 66-69, 81-84, and 96-97, before jumping again
1/4 scan line between pixels 97 and 98. 

I am doing the above simply by turning off the C4 bit, setting write
mode 0, setting the map mask register to enable one plane, and writing
to the appropriate memory address.  I've tried displaying the address
and map mask bits to be sure my algorithm is correct, and it seems to
be. 

This has me very puzzled.  The Ferraro text tends to be very confusing
when talking about the 8-bit modes, and I'm not sure exactly how they
work -- from what I had understood, C4 causes the CPU bus side of the
memory addressing to work sequentially (the memory address being shifted
right two bits, and the low-order two bits that were shifted out
selecting the memory plane), while the value in the SR bits (bits 6:5 of
graphics controller register 5) had a similar effect for the display
shift register side.  But I guess I am confused about it, since it
doesn't actually seem to work this way...  does anyone know more about
what is going on?

[If you post a reply to this message, please mail a copy to me, since
our news system is not working very reliably due to some disk problems
this week.  Or, better, mail to me and I'll summarize.  Thanks.]

					-- E.R.
-- 
Eric Roskos (roskos@CS.IDA.ORG or Roskos@DOCKMASTER.NCSC.MIL)

ccsdra@gdt.bath.ac.uk (Dave Allum) (01/10/90)

In article <1990Jan7.023913.5900@IDA.ORG> roskos@IDA.ORG (Eric Roskos) writes:
>Does anyone have experience with writing to a 512K VGA in the 8-bit
>pixel modes?
>
>Clearly you can't just write to it sequentially like in mode 13H, since
>there isn't enough of the address space available.  But I don't see any
>sort of "bank switching" register on the VGA (at least, not in the
>Ferraro text). 
>
>   ... other stuff deleted ...
>

The reason there is no bank switch register is that IBM only believes in
256K VGA which doesn't require any bank switching for the supported display
modes.

The manufacturers of the super VGA cards with extra modes and 512k provide
bank switching in various ways which involve differing address calculations
and writing (or, in some cases, reading and writing) one or more i/o ports
on the adaptor. Unfortunatly there is no single method and what you have to
do depends on the chipset used by your VGA card. The best bet is to read the
programmer's manual for your particular card.