[comp.sys.ibm.pc] INT 16h and INT 1ch in same TSR?

gregk@ubvax.UB.Com (Greg Kendall) (02/16/90)

I've been trying to create a TSR that uses both the consol I/O (16h) and
the timer (1ch) interupts. When I intercept both, the damn thing hangs.
Even if all I do in the 1ch is jmp to the old ISR. Any ideas?

mjh@cs.vu.nl (Maarten J Huisjes) (02/17/90)

gregk@ubvax.UB.Com (Greg Kendall) writes:


>I've been trying to create a TSR that uses both the consol I/O (16h) and
>the timer (1ch) interupts. When I intercept both, the damn thing hangs.
>Even if all I do in the 1ch is jmp to the old ISR. Any ideas?

Post relevant code, normally all should go well.
--

			Maarten Huisjes.  (mjh@cs.vu.nl)
			{seismo|decvax|philabs}!mcsun!botter!mjh

darcy@druid.uucp (D'Arcy J.M. Cain) (02/17/90)

In article <27128@ubvax.UB.Com> gregk@ubvax.ub.com.UUCP (Greg Kendall) writes:
>
>I've been trying to create a TSR that uses both the consol I/O (16h) and
>the timer (1ch) interupts. When I intercept both, the damn thing hangs.
>Even if all I do in the 1ch is jmp to the old ISR. Any ideas?

All I can say is that I have plenty of programs that catch these two interupts
*plus* int 10h without problem.  Can you get your code down to the smallest
size which exhibits this behaviour and post it.  It's impossible to suggest
anything without seeing something.

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