[comp.sys.ibm.pc] 386 Memory question

rem@buengc.BU.EDU (Robert E. Mee) (05/30/90)

I have a question about memory configurations
for a 386 system. I'm about to buy an SX that
comes standard with 1mb in 4 256k simms. I asked
the salesperson if it was possible to have 1
1mb simm in it's place. He went on to say that 
in order to use 1mb simms I have to use a minimum
config of 4 meg!!!

Is this correct?

this machine is an Arche 386SX if you need to know.

Thanks for any info,

Rob

kperson@plains.UUCP (Kerry Person) (05/30/90)

In article <5923@buengc.BU.EDU> rem@buengc.bu.edu (Robert E. Mee) writes:
>I have a question about memory configurations
>for a 386 system. I'm about to buy an SX that
>comes standard with 1mb in 4 256k simms. I asked
>the salesperson if it was possible to have 1
>1mb simm in it's place. He went on to say that 
>in order to use 1mb simms I have to use a minimum
>config of 4 meg!!!
>
>Is this correct?
>
>this machine is an Arche 386SX if you need to know.
>
>Thanks for any info,
>
>Rob


Keep in mind how the data is stored.  Each of those SIMMs stores four bits of
data.  If you place a 1 Meg SIMM in place of the four 256's, the
machine has no way to know that all sixteen bits should now be stored in one
chip.  In fact it is physically impossible, without some major hardware
changes.  The chips have to work parallel to each other, so if you increase
the capacity of the first four bits, you gotta do the same with the rest.

At least that's the way it seems it should work.  Or does the memory get 
stored 32 bits at a time on a 386?  Conflicting opinions welcomed.

Kerry Person
(kperson@plains.NoDak.edu)

kaleb@mars.jpl.nasa.gov (Kaleb Keithley) (05/30/90)

In article <5923@buengc.BU.EDU> rem@buengc.bu.edu (Robert E. Mee) writes:
>I have a question about memory configurations
>for a 386 system. I'm about to buy an SX that
>comes standard with 1mb in 4 256k simms. I asked
>the salesperson if it was possible to have 1
>1mb simm in it's place. He went on to say that 
>in order to use 1mb simms I have to use a minimum
>config of 4 meg!!!
>
>Is this correct?

NO *NO* NO and *NO*.   Well, maybe.  *Most SX systems can be populated
in multiples of 2MB.  DX systems (that's a full blown 386 to those of
you who don't know) must be populated in multiples of 4MB.  Note, that
is *only* if you're using Megabyte SIMMS.  If you're using 256K SIMMS,
then an SX can be populated in .5MB increments, and a DX in 1MB increments.

kaleb@thyme.jpl.nasa.gov            Jet Propeller Labs
Kaleb Keithley

kaleb@mars.jpl.nasa.gov (Kaleb Keithley) (05/30/90)

In article <4922@plains.UUCP> kperson@plains.UUCP (Kerry Person) writes:
>In article <5923@buengc.BU.EDU> rem@buengc.bu.edu (Robert E. Mee) writes:
>> [original question deleted]
>
>Keep in mind how the data is stored.  Each of those SIMMs stores four bits of
>data.  If you place a 1 Meg SIMM in place of the four 256's, the
>machine has no way to know that all sixteen bits should now be stored in one
>chip.  In fact it is physically impossible, without some major hardware
>changes.  The chips have to work parallel to each other, so if you increase
>the capacity of the first four bits, you gotta do the same with the rest.
>
>At least that's the way it seems it should work.  Or does the memory get 
>stored 32 bits at a time on a 386?  Conflicting opinions welcomed.
>

Here is a conflicting *fact*!  The SIMMs used in PCS are 9 bits wide; 8 data
bits, plus 1 parity bit.  SX machines have a 16 bit memory bus, and require
that memory be added in 16 bit increments; two SIMMs are required two do this.
A DX machine (full blown 386) has a 32 bit memory bus, and four SIMMs are
required to do this.  That is why you can put 2MB at a time into SX machines,
but must put 4MB into a DX.  Or 512KB or 1MB if you're using 256K SIMMs.

Netiquet reminder: If you don't really know, then don't post.

kaleb@thyme.jpl.nasa.gov            Jet Propeller Labs
Kaleb Keithley

bwb@sei.cmu.edu (Bruce Benson) (05/31/90)

In article <3873@jato.Jpl.Nasa.Gov> kaleb@mars.UUCP (Kaleb Keithley) writes:
>In article <4922@plains.UUCP> kperson@plains.UUCP (Kerry Person) writes:
>>In article <5923@buengc.BU.EDU> rem@buengc.bu.edu (Robert E. Mee) writes:

>required to do this.  That is why you can put 2MB at a time into SX machines,
>but must put 4MB into a DX.  Or 512KB or 1MB if you're using 256K SIMMs.

Unless of course your board manufacturer changes the rules via its own
implementation.  My Mylex board (with DX) can be configured as 1,2,4, or 8 Mb
using 256K, 256K, 1Mb, 1Mb, simms respectively.  No other combinations are
allowed - no I haven't checked to see if others are really possible, as there
seemed no reason for Mylex to "hide" other combinations (they don't sell
RAM).  Facts are helpful, but implementations tell the whole story.

>Netiquet reminder: If you don't really know, then don't post.

Yup.

Bruce

kaleb@mars.jpl.nasa.gov (Kaleb Keithley) (05/31/90)

In article <7374@fy.sei.cmu.edu> bwb@sei.cmu.edu (Bruce Benson) writes:
>In article <3873@jato.Jpl.Nasa.Gov> kaleb@mars.UUCP (Kaleb Keithley) writes:
>>In article <4922@plains.UUCP> kperson@plains.UUCP (Kerry Person) writes:
>>>In article <5923@buengc.BU.EDU> rem@buengc.bu.edu (Robert E. Mee) writes:
>Unless of course your board manufacturer changes the rules via its own
>implementation.  My Mylex board (with DX) can be configured as 1,2,4, or 8 Mb
>using 256K, 256K, 1Mb, 1Mb, simms respectively.  No other combinations are
>allowed - no I haven't checked to see if others are really possible, as there
>seemed no reason for Mylex to "hide" other combinations (they don't sell
>RAM).  Facts are helpful, but implementations tell the whole story.

Bruce, you didn't read the original articles; Robert wanted to use 1MB SIMMs
in his SX, and only wanted 2MB total.  His supplier told him he had to put
a total of 4MB in if he wanted to use 1MB SIMMs.  This is wrong.  Your own 
example uses 256K SIMMs to put 2MB in a DX.  You're mixing apples and oranges 
here.  My friends Mylex requires that SIMMs be put in, in multiples of four, 
and there are 8 total SIMM sockets.  My own SX board requires that SIMMS be 
put in in multiples of two, and also has 8 total sockets.  If you want to
use 1MB SIMMs in a DX, you have to do it in 4MB increments.  If you want
to use 1MB SIMMs in an SX, you can do it in 2MB increments.

Then Kerry said that SIMMS were only 4 bits wide.  Again, this is wrong, 
and I won't go into it again, because I just did in *my* original follow 
up article.

Another netiquet reminder: Read the article, the whole article, and nothing
but the article before following up;-)

kaleb@thyme.jpl.nasa.gov            Jet Propeller Labs
Kaleb Keithley

phil@pepsi.amd.com (Phil Ngai) (05/31/90)

In article <7374@fy.sei.cmu.edu> bwb@sei.cmu.edu (Bruce Benson) writes:
|In article <3873@jato.Jpl.Nasa.Gov> kaleb@mars.UUCP (Kaleb Keithley) writes:
|
|>That is why you can put 2MB at a time into SX machines,
|>but must put 4MB into a DX.  Or 512KB or 1MB if you're using 256K SIMMs.
|
|Unless of course your board manufacturer changes the rules via its own
|implementation.  My Mylex board (with DX) can be configured as 1,2,4, or 8 Mb
|using 256K, 256K, 1Mb, 1Mb, simms respectively.  No other combinations are

Kaleb is more right than you are. When he says you must put 4 MB into a
DX, he meant when using 1 Mb SIMMs. He forgot about machines with
8 SIMM slots, but your machine still has a minimum of 4 megs with
1 meg SIMMs.

--
Phil Ngai, phil@amd.com		{uunet,decwrl,ucbvax}!amdcad!phil
"Separate but equal": bad for blacks, good for women.

dlow@hpspcoi.HP.COM (Danny Low) (05/31/90)

>I'm about to buy an SX that
>comes standard with 1mb in 4 256k simms. I asked
>the salesperson if it was possible to have 1
>1mb simm in it's place. He went on to say that 
>in order to use 1mb simms I have to use a minimum
>config of 4 meg!!!
>
>Is this correct?
>
>this machine is an Arche 386SX if you need to know.

Maybe. The hardware design determines the permissible SIMM configurations.
It is possible the design requires a minimum of 4 physical SIMMs or some
multiple of 4 to work. One of the PCs I work with requires 1, 2, 4 or 8
SIMMs be plugged in. 3, 5, 6 and 7 SIMMs are illegal combinations.

			   Danny Low
    "Question Authority and the Authorities will question You"
	   Valley of Hearts Delight, Silicon Valley
     HP SPCD   dlow%hpspcoi@hplabs.hp.com   ...!hplabs!hpspcoi!dlow 

khoo@husc8.HARVARD.EDU (Oonchye Khoo) (05/31/90)

>>required to do this.  That is why you can put 2MB at a time into SX machines,
>>but must put 4MB into a DX.  Or 512KB or 1MB if you're using 256K SIMMs.

If you are using 1 mbit chips, then you must add 4, 2 or 1 SIMM respectively,  
for: i) 4mb at a time for 32 bit paths (386DX), 
    ii) 2mb at a time for 16 bit paths (386SX or 286) and 
   iii) 1 mb at a time for 8 bit paths (8088, XT class machines)
Divide memory (but not # of SIMMS) by four if you are using 256kbit chips.

Unless, your computer uses memory interleaving.  Multiply by two for
2 way interleaved memory (usual interleave, found on the PS/2 70's and 80's),
multiply by four for 4 way interleaved (very rare).

On the PS/2's they sometimes use SIMMS with 36 256kbit chips on them.  In
which case you only need 1 SIMM for a 2 way inteleaved 386SX or 286 machine.

Regards,  

---
 Ah Love! Could You and I with Fate conspire, To Grasp this sorry scheme
 *of things             (Lawrence Oon-Chye Khoo)               Entire, * 
 Would we not            khoo@husc8.harvard.edu               Shatter it
 *and then,        35 Oxford St, Cambridge, MA 02138           Shape it*  
 closer to our heart's Desire.   ---   From The Rubaiyat of Omar Khayam.  

akm@comix.cs.uoregon.edu (Anant Kartik Mithal) (05/31/90)

In article <4922@plains.UUCP> kperson@plains.UUCP (Kerry Person) writes:
>In article <59uengc.BU.EDU> rem@buengc.bu.edu (Robert E. Mee) writes:
>>I have a question about memory configurations
>>for a 386 system. I'm about to buy an SX that
>>comes standard with 1mb in 4 256k simms. I asked
>>the salesperson if it was possible to have 1
>>1mb simm in it's place. He went on to say that 
>>in order to use 1mb simms I have to use a minimum
>>config of 4 meg!!!
>>Is this correct?
>Keep in mind how the data is stored.  Each of those SIMMs stores four bits of
>data.  If you place a 1 Meg SIMM in place of the four 256's, the
>machine has no way to know that all sixteen bits should now be stored in one
>chip.  In fact it is physically impossible, without some major hardware
>changes.  The chips have to work parallel to each other, so if you increase
>the capacity of the first four bits, you gotta do the same with the rest.
>At least that's the way it seems it should work.  Or does the memory get 
>stored 32 bits at a time on a 386?  Conflicting opinions welcomed.
>Kerry Person

I think Kerry's analysis is correct for a system with 32 bits, like a
386DX, *not* a 386SX, which has only 16 bits. Each simm should store
*8* bits of data, not 4, so you should require 2 simms at a time.

In turn, I invite conflicting opinions... :-)

kartik


-----------------------------------------------------------------------------
Anant Kartik Mithal					akm@cs.uoregon.edu
Department of Computer Science				akm@oregon.BITNET
University of Oregon					

bwb@sei.cmu.edu (Bruce Benson) (05/31/90)

In article <3891@jato.Jpl.Nasa.Gov> kaleb@mars.UUCP (Kaleb Keithley) writes:
>In article <7374@fy.sei.cmu.edu> bwb@sei.cmu.edu (Bruce Benson) writes:
>>In article <3873@jato.Jpl.Nasa.Gov> kaleb@mars.UUCP (Kaleb Keithley) writes:
>>>In article <4922@plains.UUCP> kperson@plains.UUCP (Kerry Person) writes:
>>>>In article <5923@buengc.BU.EDU> rem@buengc.bu.edu (Robert E. Mee) writes:
>Bruce, you didn't read the original articles; Robert wanted to use 1MB SIMMs

Yup.  That's the problem with picking up threads in mid stream, mea culpa.

Bruce

altman@sbstaff2.cs.sunysb.edu (Jeff Altman) (06/01/90)

In article <1990May31.010851.20237@cs.uoregon.edu> akm@comix.cs.uoregon.edu (Anant Kartik Mithal) writes:
>In article <4922@plains.UUCP> kperson@plains.UUCP (Kerry Person) writes:
>>In article <59uengc.BU.EDU> rem@buengc.bu.edu (Robert E. Mee) writes:
>>>I have a question about memory configurations
>>>for a 386 system. I'm about to buy an SX that
>>>comes standard with 1mb in 4 256k simms. I asked
>>>the salesperson if it was possible to have 1
>>>1mb simm in it's place. He went on to say that 
>>>in order to use 1mb simms I have to use a minimum
>>>config of 4 meg!!!
>>>Is this correct?
>
>I think Kerry's analysis is correct for a system with 32 bits, like a
>386DX, *not* a 386SX, which has only 16 bits. Each simm should store
>*8* bits of data, not 4, so you should require 2 simms at a time.

Well, I have an opinion which conflicts.  At least on MCA machines,
you can install the memory in whatever fashion you wish.  Whenever the 
memory installation changes you are required to run a Reference Disk
to determine the new memory configuration.  The memory can be 4 256k 
simms, or 1 MB Simm or 2 1 MB simms, etc.  

The only requirement on the IBM PS/2s is that all of the chips be of 
the same type.  In other words, you can't replace one of the 256k 
simms with one 1 MB simm, or have 2 1MB simms and 2 2MB simms.

It is at the point of mixing chip types at which the hardware 
would have to be significantly altered.

People who own PS/2s should be very careful about listening to dealers
about memory upgrades.  This is because the types of memory installed
in a particular model is determined by the size of the hard drive 
originally installed in the machine.  For instance, the model 30 286
comes with 512k in two 256k simms when a 20MB drive is purchased, as opposed 
to one 1 MB simm when a 30 MB drive is purchased.
The same for the model 55SX, the 386sx machine.  With a 30 MB drive the 
machine has two 1MB simms, however with the 60MB drive it comes with
one 2 MB simm.  Most dealers are unaware of this and therefore will 
recommend the wrong memory kits.  

In particular, is the question of the necessity of ordering a 2MB-8MB 
memory expansion board for a memory upgrade.  If you have a 60MB drive 
55SX then you don't need it to expand to 4MB, however, if you have a 
30MB then it will cost you just as much to buy two 2MB simms and junk 
the two 1MB simms as it would be to purchase the expansion board.

So just be careful.

- Jeff (jaltman@ccmail.sunysb.edu)

scholes@snoopy.Colorado.EDU (SCHOLES MARTIN LEE) (06/01/90)

In article <7374@fy.sei.cmu.edu> bwb@sei.cmu.edu (Bruce Benson) writes:
>In article <3873@jato.Jpl.Nasa.Gov> kaleb@mars.UUCP (Kaleb Keithley) writes:
>
>>required to do this.  That is why you can put 2MB at a time into SX machines,
>>but must put 4MB into a DX.  Or 512KB or 1MB if you're using 256K SIMMs.
>
>Unless of course your board manufacturer changes the rules via its own
>implementation.  My Mylex board (with DX) can be configured as 1,2,4, or 8 Mb
>using 256K, 256K, 1Mb, 1Mb, simms respectively.  No other combinations are
>
>>Netiquet reminder: If you don't really know, then don't post.

  Excuse me if this has been covered, or I'm misunderstanding what exactly
was said here, but it seems to me Bruce made Kaleb's point for him.
It would appear that Bruce's DX box allows one or two banks of FOUR AND ONLY
FOUR simms, as long as all of the simms are of the same size.  One bank of
256's is 1 meg, 2 banks 2 meg.  One bank of 1 meg simms is 4 megs, while 2
yields 8 megs.  I have seen many DX motherboards which take this approach,
which lies well within Kaleb's "rules."
                   scholes@snoopy.colorado.edu

bressler@iftccu.ca.boeing.com (Rick Bressler) (06/02/90)

I'm guessing that part of the confusion is due to the variety of 
'standard' architectures out there and the multiple ways that they 
can be configured.  For example, my motherboard uses an
AMI bios, and a chips & tech chip set.  It has two banks for simms on the 
board and can take an expansion board with 2 banks that can be independently 
configured for either 1m or 256k simms, allowing a mix of 1m and 256k simms in 
a single computer.  Both banks on each board must be configured the same 
however.  I'd imagine this is because they are controlled by the same memory 
controller.

This allows the following combinations:  (Each bank holds 4 simms and has 
to be filled.  Does this mean that memory is interleaved across simms in 
a single bank, or is the addressing linear?)  

256k simms
----------
1m (bank 0 filled)
2m (bank 0 and 1 filled)

1m simms
--------
4m (bank 0 filled)
8m (bank 0 and 1 filled)

Rick

davidsen@sixhub.UUCP (Wm E. Davidsen Jr) (06/04/90)

In article <5923@buengc.BU.EDU> rem@buengc.bu.edu (Robert E. Mee) writes:
| I have a question about memory configurations
| for a 386 system. I'm about to buy an SX that
| comes standard with 1mb in 4 256k simms. I asked
| the salesperson if it was possible to have 1
| 1mb simm in it's place. He went on to say that 
| in order to use 1mb simms I have to use a minimum
| config of 4 meg!!!

  The answer is "probably not." For an SX you must add memory in at
least 16 bit increments, so with simms you need at least two. In a DX
you need at least four. The "at least" comes from the possibility of
interleaved memory which them requires multiples of four for SX, eight
for DX.

  I don't believe that Arche has interleave, but if it does the saleman
is correct.

  I will note that some systems can be run either way, and there was a
big stink about Tandy when their 386 first came out. Some magazines got
better performance than others and people claimed that Tandy had
supplied special models for testing. What actually did happen is that
Tandy supplied versions with 2MB, and the system ran interleaved. The
testers who only used 1MB didn't have interleave and the system ran 20%
slower due to wait states.

  The moral of this is that even if you can add just 2 simms, if your
system has interleave you probably want to take advantage of it! An SX
isn't a lot faster than an AT to start with, and adding wait states is a
good way to bog it down.
-- 
bill davidsen - davidsen@sixhub.uucp (uunet!crdgw1!sixhub!davidsen)
    sysop *IX BBS and Public Access UNIX
    moderator of comp.binaries.ibm.pc and 80386 mailing list
"Stupidity, like virtue, is its own reward" -me

km@speedy.cs.pitt.edu (Ken Mitchum) (06/06/90)

Each 1mb x 9 SIMM can be addressed as 8 bits (+ parity bit). Because you
are addressing memory as 32 bit data, you must use 4 SIMMS in parallel to
generate all 32 bits. This is why you must install a minimum of 4 SIMMS,
regardless of capacity. For 256K SIMMS, this is 1 mb. For 1mb SIMMS, this
is 4 mb.

  Ken Mitchum KY3B
  km@cs.pitt.edu