d@alice.UUCP (07/17/87)
Help! I have a desperate need for a high resolution "SLEEP" type of routine in Microsoft QuickBASIC 3.0. I am using an AT&T PC6300, and know its clock resolution goes down to tenths or hundredths of a second from the MS-DOS "time" command. What I need to find out is the location in memory of the internal clock's registers so I can use them instead of the one second resolution of the regular "timer" stuff. Does anyone know what this memory location is, or how I could find it? I'll be forever grateful. -- # Daniel Rosenberg / AT&T Bell Labs / Murray Hill / New Jersey # These opinions are necessarily mine, not my employer's. # UUCP: {ihnp4 || research || allegra}!alice!d HORN: 201/582-3059 (work) # INTERNET: d%alice%btl@csnet-relay or d@alice.att.com --More--
keeshu@nikhefk.UUCP (Kees Huyser) (07/17/87)
In article <7090@alice.UUCP> d@alice.UUCP (Daniel Rosenberg) writes: >Help! > >I have a desperate need for a high resolution "SLEEP" type of routine in >Microsoft QuickBASIC 3.0. > >I am using an AT&T PC6300, and know its clock resolution goes down to >tenths or hundredths of a second from the MS-DOS "time" command. What >I need to find out is the location in memory of the internal clock's >registers so I can use them instead of the one second resolution >of the regular "timer" stuff. > ># Daniel Rosenberg / AT&T Bell Labs / Murray Hill / New Jersey ># UUCP: {ihnp4 || research || allegra}!alice!d HORN: 201/582-3059 (work) ># INTERNET: d%alice%btl@csnet-relay or d@alice.att.com --More-- |----------------------------------------------------------------------- | port | bits | port usage |----------------------------------------------------------------------- | 0040 r/w | | timer 0 in/out register (time of day clock) | 0041 r/w | | timer 1 in/out register (storage refresh) | 0042 r/w | | timer 2 in/out register (basic sound, user) |----------------------------------------------------------------------- | 0043 w/o | | timer select and mode control | |bit7,6 | timer select | |bit5,4 | timer read/load sequence | | | 00B latch timer for stable read | | | 01B Rd/Ld timer for MSB only | | | 10B Rd/Ld timer for LSB only | | | 11B Rd/Ld timer LSB first then MSB | |bit3-1 | timer mode control | | | 000B interrupt on terminal count | | | 001B programmable one-shot | | | 010B rate generator | | | 011B square wave rate generator | | | 100B software triggered strobe | | | 101B hardware triggered strobe | |bit0=0 | timer step binary | |bit0=1 | timer step Binary Coded Decimal |----------------------------------------------------------------------- Hope this helps, -- Kees | UUCP : keeshu@nikhefk.uucp or {[wherever]!seismo}!mcvax!nikhefk!keeshu | BITNET : keeshu@hasara5.bitnet | FIDO : kees huyser at 508/15 (Opus_MacSaga) or 500/11 (HCC_Amsterdam_1) | SNAIL : kees huyser, NIKHEF-K, PO Box 4395, 1009 AJ Amsterdam, Netherlands |----------------------------------------------------------------------------- | As official spokesman for the Institute is is my privilege to announce that | the board of governors of the Institute have withdrawn my privilege of being | the official spokesman for the Institute.