cad@speedy.cs.wisc.edu (Owner of VLSI software) (04/04/88)
Just a small point first: ProDOS will boot on ][+'s, (I have tried), and it works fine. It should boot on a ][, but BASIC.SYSTEM will not load. Now a request: I just bought an Apple /// motherboard. Some of the connectors are broken, and there is no keyboard or case. I am willing to sell for parts. I am also willing to buy parts to make it work, along with all the keen manuals I can get. If you can help either way, please post or email to me at: chris@leyden.cs.wisc.edu or chris@dream.cs.wisc.edu One more item: I am planning to build an Apple //e clone that will run at 10 MHz (yes 10). This should make for one respectable machine (1 MIP maybe). It will probably slow to 1 MHz for I/O, and timing, and it's max. clock rate will be programmable in ten steps. I am planning to have a very hard time designing the system and a harder time building it. If you have ideas, or would like to hear mine, email me. I will post my preliminary plans if there is interest. Chris Schumann chris@leyden.cs.wisc.edu
ralphw@IUS3.IUS.CS.CMU.EDU (Ralph Hyre) (04/05/88)
In article <5499@spool.cs.wisc.edu> cad@speedy.cs.wisc.edu (Owner of VLSI software) writes: >One more item: > I am planning to build an Apple //e clone >that will run at 10 MHz (yes 10). This should make for one >respectable machine (1 MIP maybe). It will probably slow to 1 MHz >for I/O, and timing, and it's max. clock rate will be programmable >in ten steps. Well, everybody is still waiting for Zip chips, where are you going to find a 10 Mhz 6502? Can you still use DIP's and IC sockets at this speed? I'd happily buy build a machine that I could understand and repair myself. I recommend that you use a 12 Mhz 65816, and design it for 16M of directly addressable memory. For more //e compatibility, you'll probably want to design AE's or Checkmate's 64K bank-switching stuff in. Have you thought about 24-bit address I/O slots? (like PC AT slots) multimaster bus operation? (AST has a spec for this for the AT bus) (good for multiprocessing: 680X0 and 80X86 operations) Keep the 65832 and virtual memory in mind (even the 65816 has some capabilities for this.) A GS 'clone' would be nicer, you might even get away with > I am planning to have a very hard time designing the >system and a harder time building it. If you have ideas, or >would like to hear mine, email me. > I will post my preliminary plans if there is interest. > >Chris Schumann chris@leyden.cs.wisc.edu -- - Ralph W. Hyre, Jr. Internet: ralphw@ius2.cs.cmu.edu Phone:(412)268-{2847,3275} CMU-{BUGS,DARK} Amateur Packet Radio: N3FGW@W2XO, or c/o W3VC, CMU Radio Club, Pittsburgh, PA
cad@speedy.cs.wisc.edu (Owner of VLSI software) (04/06/88)
In article <1313@PT.CS.CMU.EDU>, ralphw@IUS3.IUS.CS.CMU.EDU (Ralph Hyre) writes: > In article <5499@spool.cs.wisc.edu> cad@speedy.cs.wisc.edu (Owner of VLSI software) writes: > > I am planning to build an Apple //e clone > >that will run at 10 MHz (yes 10). This should make for one > Well, everybody is still waiting for Zip chips, where are you going to > find a 10 Mhz 6502? Can you still use DIP's and IC sockets at this speed? > I recommend (Lots of stuff deleted) I plan to use an 8 MHz 65C02 or 65802 and run it at 10. This will be very simple. DIP's and IC sockets will run fine at 10MHZ, you can even use ECL (10K series) with wire wrap, which is what I plan to use. All I really want is a Fast Apple //e. It will have extended memory. It will not have a 24-bit address bus. > > Keep the 65832 and virtual memory in > mind (even the 65816 has some capabilities for this.) > > A GS 'clone' would be nicer, you might even get away with A GS clone would necessitate buying a GS and getting to know its hardware as intimately as I know the ][+'s and //e's. I really want to run C, BASIC, and Appleworks fast, and just build the thing for fun. (This is fun?) Some more ideas like: an 8 MHz 65C02 or 65802 or 65816 running at 10MHZ (This should be no problem, really) a divide by n counter (FACT or Fast) to switch clock speeds an EPLD Eraseable programmable logic device (PLA) for address decoding, and automatically slowing the clock when slots are addressed, to retain compatible slots. a 6545 for display (text only at first), with another EPLD to translate Apple screen memory to 6545 format. (This 6545 will need another 6502 running at 1 or 2 MHz, buffering screen info, or there will be some hellish bus contention circuitry which I don't want to deal with. There may also be a buffer between the processors to deal with the difference in speed.) Perhaps a microcontroller (like 68705) to copy EPROM into fast RAM, because cheap EPROMs are 200ns or slower. How's that for a start? > Internet: ralphw@ius2.cs.cmu.edu Phone:(412)268-{2847,3275} CMU-{BUGS,DARK} > Amateur Packet Radio: N3FGW@W2XO, or c/o W3VC, CMU Radio Club, Pittsburgh, PA Chris Schumann chris@leyden.cs.wisc.edu (Don't mail to cad@speedy, please)