gwyn@smoke.BRL.MIL (Doug Gwyn ) (11/11/88)
In article <IXQE0Qy00WAK80MF0d@andrew.cmu.edu> sk2f+@ANDREW.CMU.EDU ("Seth D. Kadesh") writes: >6502 series is a considerably underdeveloped chip - the 65816 is only limited by >the design Apple implemented in the GS. That's not quite right. The 6800/6502/65816 architecture is based on a single accumulator rather than a sizeable set of general registers such as the 68000 has. Also, even the 65816 still has too small a virtual address space (64K 8-bit bytes). Although one can cope with this by using segmenting schemes, it does get in the way. The 68000 provides a 24M 8-bit byte linear virtual address space, which is enough for almost any current application. The bottom line is that the 68000 architecture is much more convenient for the programmer. The main thing the 65* CPU has going for it is the relative ease with which existing Apple II software can be supported. That was important to you, to me, and to lots of other people, but it will gradually become less of an issue.
shankar@src.honeywell.COM (Son of Knuth) (11/12/88)
In article <8856@smoke.BRL.MIL> gwyn@brl.arpa (Doug Gwyn (VLD/VMB) <gwyn>) writes: >That's not quite right. The 6800/6502/65816 architecture is based on a >single accumulator rather than a sizeable set of general registers such >as the 68000 has. There are, off course, problems with the 65XXX family, but I don't consider the single accumulator as one of these problems (BTW, 6800 has 2 accumulators, but these arguments still hold). Given the existence of a 8-bit instruction word, the 65XXX is optimal, since the compact one-byte instruction encoding saves the cycle lost by direct/zero page memory access. The 65XXX could be designed with more registers; this will only mean that you can now access registers at the same speed as zero-page memory, since the memory data access is replaced with an instruction byte access --- in a way, the 6502 has 256 8-bit registers (zero page), and the 65816 has 32K 16-bit registers arranged in windows of 128 each. Off course, if we ever get 65XXX's with cache memory, more registers may then be desirable (although there are still better other uses for the chip space) >Also, even the 65816 still has too small a virtual >address space (64K 8-bit bytes). Although one can cope with this by >using segmenting schemes, it does get in the way. True. Segmentation sucks. Major problems with the 65XXX in my opinion - - Lack of cache (especially bad since the 65XXX is pretty well balanced between computation and memory access) - Lack of multi-bit shifting (the 65XXX would make a pretty decent general purpose processor with this) - Lack of floating point, multiplication, division (not a major problem in the 65XXX's domain, except for integer mult.) - Off course, data path width.