hts@etana.tut.fi (Harri Siirtola) (01/14/89)
Does anyone know the pins of that 15-pin D-connector in the rear panel of ][ C? The problem is, I got a NTSC/PAL converter (made for ][C) and I'd like to get colors on my ][+ with it. It should provide all the necessary signals but I don't know how to connect them. Thanks, hts
matthew@sunpix.UUCP ( Sun NCAA) (01/16/89)
In article <5768@etana.tut.fi>, hts@etana.tut.fi (Harri Siirtola) writes: > > Does anyone know the pins of that 15-pin D-connector in the rear panel > of ][ C? The problem is, I got a NTSC/PAL converter (made for ][C) and > I'd like to get colors on my ][+ with it. It should provide all the > necessary signals but I don't know how to connect them. > > Thanks, > hts From quick look at the specs in my copy of the Apple //c tech reference manual, it looks like you would want to connect Pin 13 to a ground connection, Pin 8 to a +12vdc power source, and Pin 12 to video out (all three are provided on a set of pins near the Apple ][+ game connector. A short adapter cable should get you going.) Anyway, Here's what you asked for: ----------------------------------- \ 8 7 6 5 4 3 2 1 / \ * * * * * * * * / \ 15 14 13 12 11 10 9 / \ * * * * * * * / --------------------------- Pin Signal Derived Description ------------------------------------------------------ 1 TEXT CLK 0 Video text signal from TMG; set to inverse of GR, except in double-high-resolution mode. 2 14M 14 Mhz master timing signal from the system oscillator. 3 Sync* Q3 Display horizontal and vertical syncronization signal from IOU pin 39. 4 Segb PRAS Display vertical counter bit from IOU pin4; in text mode indicates second low-order vertical counter; in graphics mode, indicates low-resolution. 5 1VSound One-volt sound signal from pin 5 of the audio hybrid circuit (AUD). 6 LDPS* 14M Video shift register load enable from pin 12 of TMG. 7 WNDW* PRAS Active area display blanking; includes both horizontal and vertical blanking. 8 +12v Regulated +12 volts DC.; can drive 350 mA. 9 PRAS* 14M RAM row-address strobe from TMG pin 19. 10 GR PRAS Graphics mode enable from IOU pin 2. 11 SEROUT* 14M Serialized character-generator output from pin 1 of 74LS166 shift-register. 12 NTSC Composite NTSC video signal from VID hybrid chip. 13 GND Ground reference and supply. 14 VIDD7 CLK 0 From 74LS374 video latch; causes half-dot shift if high. 15 CREF 14M Color reference signal from TMG pin 3; 3.58 MHz. -- Matthew Lee Stier (919) 469-8300| Sun Microsystems --- RTP, NC 27560| "Wisconsin Escapee" uucp: {sun, rti}!sunpix!matthew |