jm7e+@ANDREW.CMU.EDU ("Jeremy G. Mereness") (02/05/89)
This is a techinical question to Keith, Doug, Murph, or whoever can make sense of this to me... >Excerpts from ext.in.info-apple: 3-Feb-89 Re: The Future of the Appl.. David I Seah@relay.cs.ne (2215) > I'd like to see a >copy memory-to-memory device supported for blisteringly fast data transfers >with no speed limits to maintain "video compatibility". (Can someone explain >to me just WHY the clock must be 1Mhz to maintain compatibility? Is it the >same Woz-designed hardware in a new package? Is the Mega II in its current >form just too slow to handle a fast system clock?) Why is this? I have been wondering specifically what timing is so critical and whether there is any way to alleviate it. Especially considering the transwarp, it seems crazy that a 7MHz machine has to slow down by a factor of 7 every time it writes to the screen. Can't a buffer be created? Is the slowdown only critical for emulation mode (where the system could maybe be set to bypass the slowdown when in 16-bit mode) or is there something more fundamental? As processor speed increases, this shadowing delay will become more obvious a bottleneck... The same author mentioned an idea that has puzzled me for a while; why does Apple not create a Quickdraw Co-processor? What would be the advantages/disadvantages considering the protocol is already existent and resident in hardware ROM anyway, and it would save the CPU from tons of work.... Capt. Albatross jm7e+@andrew.cmu.edu ============ Bureuacracy takes all the fun out of computing. disclaimer: The opinions expressed herein are made under duress of academic stress and is often prone to overzealous error. The author, not enjoying the prospect of remaining eternally ignorant, therefore welcomes any replies that would further that end.