facq@geocub.greco-prog.fr (09/10/89)
Hi ! It's the first time I try the net...
I'm trying to build my own STEREO INTERFACE & I have problems
with pins 4 (Channel 0) and 6 (strobe address)
on the ENSONIQ connector : they aren't synchronized & I can't AND them
properly. Any idea of a solution ?
( the Symptom is : pin6 is rising & falling too early of an 8th of
an instrument compared to pin4 ...)
Thanks for any answer.
------------------------------------------------------------------------------
Jean-Remy (JR) FACQ ENSERB (French Enginner Computer School)
facq@goofi.UUCP \*\*\* Savoir=Prevoir , Prevoir=Pouvoir */*/*/
facq@goofi.greco-prog.fr uunet!mcvax!inria!geocub!goofi!facq
******** Well Known APPLE Addict !!! *********sb@pro-generic.cts.com (Stephen Brown) (09/13/89)
Network Comment: to #4989 by mcsun!inria!geocub!facq@uunet.uu.net I think an easier way to do it is to use a "CMOS Switch" such as the 74HCT4052. This chip is a dual, 4 channel analog demultiplexer, or in other words, it takes a 2 bit address and turns on 1 of 4 switches (the switches are all connected together on one side). Feed MUX0 and STB in as addresses, and connect analog audio to channel 0 (of one demux) and channel 1 (of the other demux). Ground all unused channels (1,2,3 or one, and 0,2,3 of the other). The decoded stereo output will appear on each demux "common". I know this works, as it creates beautiful sound (along with 10Khz low pass filters) with my IIgs. ------------------------------------------ ProLine: sb@pro-generic ARPA: crash!pnet01!pro-generic!sb@nosc.mil INET: sb@pro-generic.cts.com UUCP: crash!pnet01!pro-generic!sb ------------------------------------------ UUCP: crash!pro-generic!sb ARPA: crash!pro-generic!sb@nosc.mil INET: sb@pro-generic.cts.com
brianw@microsoft.UUCP (Brian Willoughby) (09/16/89)
In article <8909140602.AA19193@trout.nosc.mil> sb@pro-generic.cts.com (Stephen Brown) writes: > >I think an easier way to do it is to use a "CMOS Switch" such as the >74HCT4052. This chip is a dual, 4 channel analog demultiplexer, or in other >words, it takes a 2 bit address and turns on 1 of 4 switches (the switches are >all connected together on one side). > >Feed MUX0 and STB in as addresses, and connect analog audio to channel 0 (of >one demux) and channel 1 (of the other demux). Ground all unused channels >(1,2,3 or one, and 0,2,3 of the other). The decoded stereo output will appear >on each demux "common". > >I know this works, as it creates beautiful sound (along with 10Khz low pass >filters) with my IIgs. I'm sure that this works for you, but you've got it exactly backwards. The analog audio output from the Ensoniq chip should connect to the demux "common", with the individual channel providing separate outputs. This way, channel 0 appears on channel 0 of the demux, and channel 1 appears on channel 1, etc. You only need one of the 4 channel halfs this way. In fact, using the same number of chips, this circuit would allow access to the other channels of the DOC chip (but only if the full four bit address is available on the connector to select all eight outputs defined for the DOC chip). If you connected the audio outputs to BOTH "common" pins, and send address bit 3 (most significant) to the enable for one half and through an inverter to the other enable, then you would have an eight output stereo card. The Ensoniq chip was designed to save pins by having one audio output and a digital address to specify where the output should go. It cycles through all the oscillators, outputting the present voltage and the address for that channel, and then continues on to the next oscillator. I think that the IIgs provides all four bits of the address, because I remember 8 channel output cards being advertised. +---------+ +------+ | Ensoniq |---+---|In A |-- channel 0 (left) | D O C | | | 4052 |-- channel 1 (right) +---------+ | +-|E |-- channel 2 | | |0 1 2 |-- channel 3 |\ | | +------+ A3 -+--| O----|-+ | | | | |/ | +------+ | +---|In B |-- channel 4 +-------------|E |-- channel 5 Figure 1. | |-- channel 6 The simple |0 1 2 |-- channel 7 version +------+ | | | A0 A1 A2 In the above circuit, A0 corresponds to MUX0, A1 to MUX1, etc. The 'E' enables should actually be combined with STB so that the outputs are only active when the voltage coming from the DOC is valid. I don't remember whether STB is active high or low - so I didn't know whether to put AND gates or OR gates in the circuit. Actually, the 74HCT4052 is supposed to be a differential demux, with the inverted signal switched by one half and the non-inverted signal switched by the other 4 channel half. Differential signals are generally used so that any noise picked up along the way (i.e. through the switching network) will be cancelled out when the two parts of the signal are re-combined at the outputs by a differential amp. There is nothing wrong with sending separate, unrelated signals through each half, but you might as well use the 4051 chip - an 8 channel mux. Then you wouldn't need the inverter on the enables, and you could use all four address bits directly. BTW, the newer DOC II chip on the Ensoniq Performance Sampler uses differential outputs. The is one problem, though, with both of our circuits: when a particular channel is NOT selected, the WRONG voltage is sent to that output. In your circuit, Stephen, each channel is GROUNDED when not selected. That distorts the output somewhat. In my circuit, there is an open circuit whenever the channel is not selected. That's not a good idea either. Both circuits would be improved with the addition of a sample-and-hold amplifier - which basically stores (samples) the most recent voltage for that output in a low leakage capacitor, and holds it while the other channels are being updated. Your 10 kHz filter undoubtedly has a lot of capacitance, so it is probably acting as S/H amp to some extent, and it probably is reducing the spikes that are being introduced into both of your output channels as they are grounded between each update. If my circuit were followed with a little capacitance, then it would provide a very clean output. For the true hardware hacks, you'll recognise how an extra capacitor makes the circuit a cheap S/H amp. / <- open-circuit switch (4051 switch) / |\ <- op-amp voltage follower ------o o-----+------| \ | | >----O analog output Cap ----- | / ----- |/ Figure 2. | S/H: for each ----- output --- - I leave the choice of capacitor value as an exercise for the reader. Besides, I'm not too good at computing component values in my head. Hint, the value of the cap depends upon the time constant needed for the sampling rate being used - so the cap doesn't discharge before it is next updated. You also don't wat a large cap, or it will take too long to change to each new output voltage. Brian Willoughby UUCP: ...!{tikal, sun, uunet, elwood}!microsoft!brianw InterNet: microsoft!brianw@uunet.UU.NET or: microsoft!brianw@Sun.COM Bitnet brianw@microsoft.UUCP