[comp.sys.apple] Harvard Architecture

jason@madnix.UUCP (Jason Blochowiak) (03/16/90)

q4kx@vax5.cit.cornell.edu (Joel Sumner) writes:
>1.  Could someone please explain exactly what "Harvard Architecture" is and
>how it affects the 65816 (or how it is implemented in a processor)?

	A Princeton architecture (also known as a Von Neumann machine)
consists of (basically) a CPU and some memory. That memory can function as
either data or code.

	The Harvard architecture, on the other hand, has a CPU, code memory,
and data memory. The one major problem with this is that code is sometimes
data, and so it didn't get real popular for a long time. Well, people are
getting interested in it again, now that it's possible to have multiple
segments - it makes caching code easier, as the CPU won't have to re-fetch
the code from main memory ever (assuming there's enough space in the
cache), as it won't change.

	Now, the 680x0's architecture discourages self-modifying code, so
it's not too painful for it to go Harvard, but the 65816 & 6502 programmers
of the world do use self-modifying code (despite the fact that it's a real
pain to debug), and that would pretty much invalidate the entire code/data
separation.

	Good enough?

> [#2 was something else...]
>Thanks
>Joel
>q4kx@cornella


-- 
                      Jason Blochowiak - jason@madnix.UUCP
or, try:         astroatc!nicmad!madnix!jason@spool.cs.wisc.edu
       "Education, like neurosis, begins at home." - Milton R. Saperstein

toddpw@tybalt.caltech.edu (Todd P. Whitesel) (03/17/90)

jason@madnix.UUCP (Jason Blochowiak) writes:

>	Now, the 680x0's architecture discourages self-modifying code, so
>it's not too painful for it to go Harvard, but the 65816 & 6502 programmers
>of the world do use self-modifying code (despite the fact that it's a real
>pain to debug), and that would pretty much invalidate the entire code/data
>separation.

I don't that that's too much of a problem, that data paths on the chip should
have no problem allowing the I-cache to be accessed as if they were external
cache RAM. This would slow down the self-modifiying operations but I don't
see it as a major performance problem. The '816 has many instructions which
do what most people used self-modifiying code for on the 6502...

Todd Whitesel
toddpw @ tybalt.caltech.edu