PROLOG-REQUEST@SUSHI.STANFORD.EDU (Chuck Restivo, The Moderator) (09/14/87)
PROLOG Digest Tuesday, 15 Sep 1987 Volume 5 : Issue 59
Today's Topics:
Query - Implementation Papers & WAM & Linking Turbo,
Announcement - ASPLOS-II Program
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Date: 25 Jun 87 23:18:35 GMT
From: mcvax!dutrun!dutesta!elvis@seismo.css.gov (h)
Subject: Implementation papers (?)
I've read your question about Prolog implementations. I've also read a
reply on the news that you should buy Campbells book on Prolog
implementations. You can do that, but the book, although quite recent
is more or less out of date. At the moment I am writing a report on
Prolog implementations for my study; I am a student of the Technical
University Delft (Holland). What the book doesn't cover at all are
the theoretic advances being made by David Warren He's made a
theoretical model of a Prolog machine, nowadays called the WAM (Warren
Abstract Machine), and it has become the de facto standard for Prolog
implementations. Sadly enough there is -as far as i know- *no* good
book on Prolog implementations. I get my information by searching in
scientific publications. I think that what you need is my report,
once it's finished. Although I am not yet too confident about the
quality of my report, at the very least it will contain an overview of
quite a lot of literature references. Interested? Let me know.
Greetings,
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Date: 11 Sep 87 12:43:30 GMT
From: mcvax!dutrun!dutesta!elvis@seismo.css.gov (h)
Subject: Information wanted on the Warren Abstract Machine
I am a student of the Technical University of Delft in Holland and I am
currently writing a report on the Warren Abstract Machine.
I am looking for recent literature on the following topics:
- Warren Abstract and related machine
- implementation of the Warren Abstract Machine
- revision of the Warren Abstract Machine.
I have already read the article:
Tutorial on the Warren Abstract Machine for Computational Logic
by John Gabriel, e.a., June 1985.
I would appreciate any information.
-- R. Tjon
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Date: 24 Aug 87 15:02:38 GMT
From: Bob Rennick <uunet!mnetor!utzoo!dciem!nrcaer!ragno!rennick@seismo>
Subject: Linking fortran and turbo-provlog
Borland's manual is not to explicit on the subject, could someone
please help. Examples with parameter passing of all types would be
appreciated. Which compiler is best for ease and efficiency ?
-- Stanley Moran
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Date: 28 Aug 87 23:23:41 GMT
From: Martin Freeman <labrea!cascade!mfreeman@decwrl.dec.com>
Subject: ASPLOS-II ADVANCE PROGRAM
SECOND INTERNATIONAL CONFERENCE ON
ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES
AND OPERATING SYSTEMS
(ASPLOS-II)
Palo Alto, California, October 5-8, 1987
Sponsored by ACM and Computer Society of the IEEE
CONFERENCE CHAIRMEN
General: Martin Freeman, Stanford University & Philips
Research Labs
Program: Randy Katz, U.C. Berkeley
Finance: Dennis Reinhardt, DAIR Computer Systems
Publicity: Jim Flournoy, Consultant
Monday, October 5
08:00-09:00 Tutorial Registration
09:00-12:00 Tutorial I: CACHE MEMORIES, Alan Smith, U.C. Berkeley
Survey of design considerations for cache memories
including recent material on cache workloads, cache
miss ratios, and cache consistency algorithms.
12:00-01:00 LUNCH
01:00-04:00 Tutorial II: RISC ARCHITECTURES: PRINCIPLES & EXAMPLES,
John Hennessy, Stanford University
Survey of the principles behind the RISC approach using
research and commercial machines to illustrate design
tradeoffs.
Tuesday, October 6
08:00-09:00 Conference Registration
09:00-10:00 KEYNOTE SPEAKER: Niklaus Wirth, ETH
"Hardware Architectures for Programming Languages, and
Programming Languages for Hardware Architectures"
10:00-10:30 BREAK
10:30-12:00 SESSION I: OPERATING SYSTEMS, Chair: Forest Baskett,
Silicon Graphics
"VLSI Assist in Building a Multiprocessor Operating
System," B. Beck, B. Kasten, S. Thakkar, Sequent
Computer Systems
"Architectural Support for Multilanguage Parallel
Programming on Heterogeneous Systems," R. Bisiani,
A. Forin, Carnegie-Mellon University
"Machine-Independent Virtual Memory Management for
Paged Uniprocessor and Multiprocessor Architectures,"
R. Rashid, A. Tevanian, M. Young, D. Golub, R. Baron,
D. Black, W. Bolosky, J. Chew, Carnegie-Mellon
University
12:00-01:00 LUNCH
01:00-03:10 SESSION II: LANGUAGES AND INSTRUCTION SETS, Chair:
Chuck Thacker, DEC Systems Research Lab
"An Architecture for the Direct Execution of the
FORTH Programming Language," J. Hayes, M. Fraeman,
R. Williams, T. Zaremba, The Johns Hopkins University
Applied Physics Lab
"Tags and Type Checking in LISP: Hardware and Software
Approaches," P. Steenkiste, J. Hennessy, Stanford
University
"The Effect of Instruction Set Complexity on Program
Size and Memory Performance," J. Davidson, R. Vaughn,
U. of Virginia
"The DRAGON Processor," R. Atkinson, E. McCreight,
Xerox PARC
03:10-03:40 BREAK
03:40-05:00 SESSION III: MISCELLANEOUS ARCHITECTURAL SUPPORT,
Chair: David Ditzel, Sun Microsystems
"Coherency for Multiprocessor Virtual Address Caches,"
J. Goodman, U. of Wisconsin
"Cheap Hardware Support for Software Debugging and
Profiling," T. Cargill, B. Locanthi, AT&T Bell Labs
"An Experimental Coprocessor for Implementing
Persistent Objects on an IBM 4381," C. Georgiou,
S. Palmer, P. Rosenfeld, IBM T.J. Watson Research
Center
Wednesday, October 7
09:10-10:20 SESSION IV: COMPILERS I, Chair: John Hennessy,
Stanford University
"Integer Multiplication and Division on the HP
Precision Architecture," D. Magenheimer, L. Peters,
K. Pettis, D. Zuras, Hewlett-Packard
"The Mahler Experience: Using an Intermediate
Language as a Machine Description," D. Wall,
M. Powell, DEC Western Research Lab
"A Study of Scalar Compilation Techniques for
Pipelined Supercomputers," S. Weiss, J. E. Smith,
MCC
10:20-10:50 BREAK
10:50-12:00 SESSION V: COMPILERS II, Chair: Steven Muchnick,
Sun Microsystems
"Compiling Smalltalk-80 to a RISC," W. Bush,
A. Samples, D. Ungar, P. Hilfinger, U.C. Berkeley
"How Many Addressing Modes are Enough?," F. Chow,
S. Correll, M. Himelstein, E. Killian, L. Weber,
MIPS Computer Systems
"Superoptimizer--A Look at the Smallest Program,"
H. Massalin, Columbia University
12:00-01:30 LUNCH
01:30-03:00 SESSION VI: FUNCTIONAL & LOGIC LANGUAGES, Chair:
Randy Katz, U.C. Berkeley
"Performance and Architectural Evaluation of the
PSI Machine," H. Nakashima, K. Taki, K. Nakajima,
ICOT
"RISCS or CISCs for Prolog: A Case Study,"
G. Borriello, A. Cherenson, P. Danzig, M. Nelson,
U.C. Berkeley
"A RISC Architecture for Symbolic Computation,"
R.B. Kieburtz, Oregon Graduate Center
03:00-03:30 BREAK
03:30-04:40 SESSION VII: NEW MACHINES I, Chair: Jim Goodman,
U. of Wisconsin
"Design Tradeoffs to Support the C Programming
Language in the CRISP Microprocessor,"
D. Ditzel, Sun Microsystems, H. McLellan,
A. Berenbaum, AT&T Bell Labs
"Firefly: A Multiprocessor Workstation," C. Thacker,
L. Stewart, DEC Systems Research Center
"Pipelining and Performance in the VAX 8800 Processor,"
D. Clark, DEC
08:00-10:00 PANEL SESSION: COMPILER SCHEDULED ARCHITECTURES:
HORIZONTAL AND VERTICAL ORGANIZATIONS,
Organizer: Martin Freeman, Stanford University & Philips
Research Labs,
Panelists: Steven Muchnick, Sun Microsystems, Mike Johnson,
AMD, Joseph Fisher, Multiflow, Bob Rau, Cydrome.
Thursday, October 8
08:40-10:00 SESSION VIII: NEW MACHINES II, Chair: E. M. McCreight,
Xerox PARC
"A VLIW Architecture for a Trace Scheduling Compiler,"
R. Colwell, R. Nix, J. O'Donnell, D. Papworth, P. Rodman,
Multiflow Computer Inc.
"Parallel Computers for Graphics Applications," A. Leventhal,
M. Paquette, J. Lawson, P. Hanrahan, PIXAR, Inc.
"The ZS-1 Processor," J.E. Smith, G. Dermer, B. Vanderwarn,
S. Klinger, C. Rozewski, D. Fowler, K. Skidmore, J. Laudon,
Astronautics Corporation of America
10:00-10:30 BREAK
10:30-12:00 PANEL SESSION: LIES, DAMNED LIES, AND BENCHMARKS,
Organizer: Alan Smith, U.C. Berkeley,
Panelists: Jim Gray, Tandem, Harry Nelson, Lawrence
Livermore Labs, Forest Baskett, Silicon Graphics,
Doug Clark, DEC Hudson, John Hennessy, Stanford University
REGISTRATION
Conference registration includes one copy of the proceedings, lunches,
breaks, etc. Tutorial registration covers both tutorials and includes
one copy of the notes for each tutorial, a lunch, and breaks. Student
registration does not include meals. For further information contact
Martin Freeman, (415) 725-3633, mfreeman@sierra.stanford.edu.
ASPLOS REGISTRATION FORM
NAME:..................................................................
Affiliation:...........................................................
Address:...............................................................
.......................................................................
Phone No.:.............................................................
ACM No.:...............................................................
IEEE No.:..............................................................
(Before Sept 5) Member Non-Member Student
Symposium __$185 __$235 __$ 75
Tutorial __$150 __$200 __$ 50
(After Sept 5) Member Non-Member Student
Symposium __$235 __$295 __$100
Tutorial __$200 __$250 __$ 75
__Check Drawn on US Bank Payable To:
ASPLOS-II
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Palo Alto, CA 94303 USA
__Master Card __VISA
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End of PROLOG Digest
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