ForthNet@willett.pgh.pa.us (ForthNet articles from GEnie) (08/31/90)
Category 18, Topic 86 Message 11 Thu Aug 30, 1990 D.RUFFER [Dennis] at 00:28 EDT Re: dwp@willett.pgh.pa.us (Doug Philips) > Is stack adjustment really a portability problem in general, or > is it *just* the way John wants to do it. If someone can tell how you add size to a hardware stack, I think the TC might consider solving the problem. However even a soldering iron is not much help on a chip with internal stacks. I suppose you could buffer the overflow, but then you loose all the advantage of having a fast internal stack. I just can't see how to do it. DaR ----- This message came from GEnie via willett through a semi-automated process. Report problems to: uunet!willett!dwp or dwp@willett.pgh.pa.us
peter@ficc.ferranti.com (Peter da Silva) (09/01/90)
In article <1648.UUL1.3#5129@willett.pgh.pa.us> ForthNet@willett.pgh.pa.us (ForthNet articles from GEnie) writes: > If someone can tell how you add size to a hardware stack, I think the TC might > consider solving the problem. However even a soldering iron is not much help > on a chip with internal stacks. I suppose you could buffer the overflow, but > then you loose all the advantage of having a fast internal stack. When you overflow, copy out half the stack (however you like... if you can handle overflow at all you can do this just by pushing data on the stack). Now you won't overflow again for a while. When you underflow, pull in half the stack. There will still be some overhead for overflows, but depending on the stack size it can be made quite small. -- Peter da Silva. `-_-' +1 713 274 5180. 'U` peter@ferranti.com