pcl@ihlpf.ATT.COM (pcl) (02/18/89)
I wonder if any microprocessor supports HLL instruction such as: incbf memloc,bf_offset,bf_len /* increment a bit field */ setbf memloc,bf_offset,bf_len,immed /* increment a bit field */ Or perhaps I am daydreaming! Anyway, the following C program generates the corresponding 8086 and 68k instructions which seem quite inefficient. Any optimization suggestions? ********* C *********** struct DHDR { unsigned short gfi: 4; unsigned short lci:12; unsigned short pr : 3; unsigned short m : 1; unsigned short ps : 3; unsigned short x : 1; }; char pktbuf[1024]; struct DHDR *dhp; main() { dhp = (struct DHDR *)pktbuf; dhp->pr++; dhp->ps++; } ********* 8086 *********** _main proc near ; ?debug L 14 mov word ptr DGROUP:_dhp,offset DGROUP:_pktbuf ; ?debug L 15 mov bx,word ptr DGROUP:_dhp mov ax,word ptr [bx+2] inc ax and ax,7 and word ptr [bx+2],-8 or word ptr [bx+2],ax ; ?debug L 16 mov bx,word ptr DGROUP:_dhp mov ax,word ptr [bx+2] add ax,16 and ax,112 and word ptr [bx+2],-113 or word ptr [bx+2],ax @1: ; ?debug L 17 ret _main endp ********* 68000 *********** main: link %fp,$.F1 moveml <.RM1>,-(%sp) .ln 1 .def .bf; .val .; .scl 101; .type 0; .line 1; .endef .ln 2 / line 14, file "x.c" movel $pktbuf,dhp / assign 14 .ln 3 / line 15, file "x.c" movel dhp,%a0 / opltype 7 clr %d0 moveb 2(%a0),%d0 lsr $5,%d0 / fld 1 add $1,%d0 / asg opsimp 1 movel dhp,%a0 / opltype 7 move %d0,%d1 lslb $5,%d1 andb $0x1f,2(%a0) orb %d1,2(%a0) / assign 9 .ln 4 / line 16, file "x.c" movel dhp,%a0 / opltype 7 clr %d0 moveb 2(%a0),%d0 lsr $1,%d0 and $7,%d0 / fld 3 add $1,%d0 / asg opsimp 1 movel dhp,%a0 / opltype 7 move %d0,%d1 lslb $1,%d1 andb $0xe,%d1 andb $0xf1,2(%a0) orb %d1,2(%a0) / assign 9 .46: .def .ef; .val .; .scl 101; .type 0; .line 5; .endef .ln 5 unlk %fp rts
hascall@atanasoff.cs.iastate.edu (John Hascall) (02/19/89)
In article <7756@ihlpf.ATT.COM> pcl@ihlpf.UUCP (pcl) writes: >I wonder if any microprocessor supports HLL instruction such as: > >incbf memloc,bf_offset,bf_len /* increment a bit field */ >setbf memloc,bf_offset,bf_len,immed /* increment a bit field */ ^^^^ set? A VAX (I guess we can consider a uVAX a uProcessor :-) could do something like this for "incbf": EXTV #pos,#bits,base,temp ; extract and extend base<pos:pos+bits-1> INCL temp ; increment INSV temp,#pos,#bits,base ; insert into base<pos:pos+bits-1> and of course, just INSV can be used for "setbf". John Hascall / ISU Comp Center
ditto@cbmvax.UUCP (Michael "Ford" Ditto) (02/19/89)
In article <7756@ihlpf.ATT.COM> pcl@ihlpf.UUCP (pcl) writes: >Anyway, the following C program generates the corresponding 8086 and 68k >instructions which seem quite inefficient. Any optimization suggestions? > >********* C *********** > >struct DHDR { > unsigned short gfi: 4; > unsigned short lci:12; > unsigned short pr : 3; > unsigned short m : 1; > unsigned short ps : 3; > unsigned short x : 1; >}; > >char pktbuf[1024]; >struct DHDR *dhp; >main() >{ > dhp = (struct DHDR *)pktbuf; > dhp->pr++; > dhp->ps++; >} > [ really awful compiler output deleted ] The 68020 has bit field instructions which help quite a bit. Here's the 68020 code that GCC generates: (using GCC v1.19: gcc -m68020 -fomit-frame-pointer -O -S T.c) text even global main main: mov.l &pktbuf,dhp bfextu pktbuf+2{&0:&3},%d0 add.l &1,%d0 bfins %d0,pktbuf+2{&0:&3} bfextu pktbuf+2{&4:&3},%d0 add.l &1,%d0 bfins %d0,pktbuf+2{&4:&3} rts comm dhp,4 comm pktbuf,1024 -- -=] Ford [=- "The number of Unix installations (In Real Life: Mike Ditto) has grown to 10, with more expected." ford@kenobi.cts.com - The Unix Programmer's Manual, ...!sdcsvax!crash!kenobi!ford 2nd Edition, June, 1972. ditto@cbmvax.commodore.com