techreports-request@uucp.UUCP (03/07/86)
From: ti-csl!smu!leff@im4u.UUCP (Laurence Leff) California Institute of Technology Computer Science, 256-80 Pasadena California 91125 Technical Reports -- September 1985 Available from the Computer Science Department Library Prices include postage and help to defray our printing and mailing costs. If you wish to order any of the reports listed, return order with your check or international money order (in U.S. dollars) payable to CALTECH. PREPAYMENT IS REQUIRED FOR ALL MATERIALS. _______________________________________________________________________________ 5203:TR:85 C Programmer's Guide to the Cosmic Cube, Su, Wen-King, Reese Faucette and Chuck Seitz $9.00 5202:TR:85 Submicron Systems Architecture, ARPA Semiannual Technical Report $15.00 5200:TR:85 ANIMAC: A Multiprocessor Architecture for Real-Time Computer Animation, PhD thesis Whelan, Dan $18.00 5198:TR:85 Neutral Networks, Pattern Recognition & Fingerprint Hallucination, PhD thesis Mjolness, Eric $8.00 5197:TR:85 Sequential Threshold Circuits, MS thesis Platt, John $7.00 5196:TR:85 ECL: An Experimental Concurrent Language, Athas, Bill $5.00 5195:TR:85 A New Generalization of Dekker's Algorithm for Mutual Exclusion, Martin, Alain J $3.00 5194:TR:85 The Sneptree - A Versatile Interconnection Network, Li, Pey-yun Peggy and Alain J Martin $5.00 5193:TR:85 A Delay-Insensitive Fair Arbiter, Martin, Alain J $4.00 5190:TR:85 Concurrency Algebra and Petri Nets, Choo, Young-il $3.00 5189:TR:85 Hierarchical Composition of VLSI Circuits, PhD Thesis Whitney, Telle $10.00 5188:TR:85 An Inverse Limit Construction of a Domain of Infinite Lists, Choo, Young-il $3.00 5185:TR:85 Combining Computation with Geometry, PhD Thesis Lien, Sheue-Ling $11.00 5184:TR:85 Placement of Communicating Processes on Multiprocessor Networks, Ms Thesis Steele, Craig $7.00 5178:TR:85 Submicron Systems Architecture, ARPA Semiannual Technical Report $9.00 5177:TR:85 Hot-Clock nMOS, Proc. 1985 Chapel Hill Conference on VLSI, Seitz, Charles, A H Frey, S Mattisson, S D Rabin, D A Speck, and J L A van de Snepscheut $4.00 5174:TR:85 Balanced Cube: A Concurrent Data Structure, Dally, William J and Charles L Seitz $7.00 5172:TR:85 Combined Logical and Functional Programming Language, Newton, Michael $6.00 5168:TR:84 Object Oriented Architecture, Dally, Bill and Jim Kajiya $4.00 5165:TR:84 Customizing One's Own Interface Using English as Primary Language, Thompson, B H and Frederick B Thompson $4.00 5164:TR:84 ASK French - A French Natural Language Syntax, MS Thesis Sanouillet, Remy $13.00 5160:TR:84 Submicron Systems Architecture, ARPA Semiannual Technical Report $7.00 5158:TR:84 VLSI Architecture for Sound Synthesis, Wawrzynek, John and Carver Mead $6.00 5157:TR:84 Bit-Serial Reed-Solomon Decoders in VLSI, PhD Thesis Whiting, Douglas $15.00 5148:TR:84 Fair Mutual Exclusion with Unfair P and V Operations, Martin, Alain and Jerry Burch $4.00 5147:TR:84 Networks of Machines for Distributed Recursive Computations, Martin, Alain and Jan van de Snepscheut $4.00 5143:TR:84 General Interconnect Problem, MS Thesis Ngai, John $5.00 5140:TR:84 Hierarchy of Graph Isomorphism Testing, MS Thesis Chen, Wen-Chi $5.00 5139:TR:84 HEX: A Hierarchical Circuit Extractor, MS Thesis Oyang, Yen-Jen $4.00 5137:TR:84 Dialogue Designing Dialogue System, PhD Thesis Ho, Tai-Ping $7.00 5136:TR:84 Heterogeneous Data Base Access, PhD Thesis Papachristidis, Alex $5.00 5135:TR:84 Toward Concurrent Arithmetic, MS Thesis Chiang, Chao-Lin $7.00 5134:TR:84 Using Logic Programming for Compiling APL, MS Thesis Derby, Howard $2.00 5133:TR:84 Hierarchical Timing Simulation Model for Digital Integrated Circuits and Systems, PhD Thesis Lin, Tzu-mu $13.00 5132:TR:84 Switch Level Fault Simulation of MOS Digital Circuits, MS Thesis Schuster, Mike $10.00 5130:TR:84 LOG The Chipmunk Logic Simulator User's Guide, Gillespie, Dave $3.00 5129:TR:84 Design of the MOSAIC Processor, MS Thesis Lutz, Chris $5.00 5128:TM:84 Linguistic Analysis of Natural Language Communication with Computers, Thompson, Bozena H $3.00 5125:TR:84 Supermesh, MS Thesis Su, Wen-king $6.00 5124:TR:84 Probe: An Addition to Communication Primitives, Martin, Alain $4.00 5123:TR:84 Mossim Simulation Engine Architecture and Design, Dally, Bill $14.00 5122:TR:84 Submicron Systems Architecture, ARPA Semiannual Technical Report $8.00 5120:TM:84 Mathematical Approach to Modeling the Flow, Johnsson, Lennart and Danny Cohen $1.00 5119:TM:84 Integrative Approach to Engineering Data and Automatic Project Coordination, Segal, Richard $1.00 5118:TR:84 SMART User's Guide, Ngai, John $2.00 5114:TM:84 ASK As Window to the World, Thompson, Bozena, and Fred Thompson $3.00 5113:TR:84 WoLery, Mead, Carver A $4.00 5112:TR:83 Parallel Machines for Computer Graphics, PhD Thesis Ulner, Michael $22.00 5106:TM:83 Ray Tracing Parametric Patches, Kajiya, James T $1.00 5105:TR:83 Memory Management in the Programming Language ICL, Wawrzynek, John $2.00 5104:TR:83 Graph Model and the Embedding of MOS Circuits, MS Thesis Ng, Tak-Kwong $9.00 5103:TR:83 Submicron Systems Architecture, ARPA Semiannual Technical Report $7.00 5102:TR:83 Experiments with VLSI Ensemble Machines, Seitz, Charles L $2.00 5101:TM:83 Concurrent Fault Simulation of MOS Digital Circuits, Bryant, Randal E $1.00 5099:TM:83 VLSI and the Foundations of Computation, Mead, Carver $1.00 5098:TM:83 New Techniques for Ray Tracing Procedurally Defined Objects, Kajiya, James T $2.00 5097:TR:83 Design of a Self-timed Circuit for Distributed Mutual Exclusion, Martin, Alain J $4.00 5094:TR:83 Stochastic Estimation of Channel Routing Track Demand, Ngai, John $2.00 5093:TR:83 Design of the MOSAIC Element, Lutz, Chris, Steve Rabin, Chuck Seitz and Don Speck $1.00 5092:TM:83 Residue Arithmetic and VLSI, Chiang, Chao-Lin and Lennart Johnsson $2.00 5091:TR:83 Race Detection in MOS Circuits by Ternary Simulation, Bryant, Randal E $2.00 5090:TR:83 Space-Time Algorithms: Semantics and Methodology, PhD Thesis Chen, Marina Chien-mei $9.00 5089:TR:83 Signal Delay in General RC Networks with Application to Timing Simulation of Digital Integrated Circuits, Lin, Tzu-Mu and Carver A Mead $10.00 5086:TR:83 VLSI Combinator Reduction Engine, MS Thesis Athas, William C Jr $4.00 5084:TM:83 Tree Machine: An Evaluation of Strategies for Reducing Program Loading Time, Li, Pey-yun Peggy, and Lennart Johnsson $3.00 5082:TR:83 Hardware Support for Advanced Data Management Systems, PhD Thesis Neches, Philip $10.00 5081:TR:83 RTsim - A Register Transfer Simulator, MS Thesis Lam, Jimmy $4.00 5080:TR:83 Distributed Mutual Exclusion on a Ring of Processes, Martin, Alain $4.00 5079:TR:83 Highly Concurrent Algorithms for Solving Linear Systems of Equations, Johnsson, Lennart $2.00 5078:TR:83 Submicron Systems Architecture, ARPA Semiannual Technical Report $5.00 5075:TR:83 General Proof Rule for Procedures in Predicate Transformer Semantics, Martin, Alain $2.00 5074:TR:83 Robust Sentence Analysis and Habitability, Trawick, David $10.00 5073:TR:83 Automated Performance Optimization of Custom Integrated Circuits, PhD Thesis Trimberger, Steve $12.00 5068:TM:83 Hierarchical Simulator Based on Formal Semantics, Proc Third Caltech Conf on VLSI Chen, Marina and Carver Mead $1.00 5065:TR:82 Switch Level Model and Simulator for MOS Digital Systems, Bryant, Randal E $3.00 5055:TR:82 FIFO Buffering Transceiver: A Communication Chip Set for Multiprocessor Systems, MS Thesis Ng, Charles H $5.00 5054:TM:82 Introducing ASK, A Simple Knowledgeable System, Conf on App'l Natural Language Processing Thompson, Bozena H and Frederick B Thompson $3.00 5052:TR:82 Submicron Systems Architecture, ARPA Semiannual Technical Report $8.00 5051:TM:82 Knowledgeable Contexts for User Interaction, Proc Nat'l Computer Conference Thompson, Bozena, Frederick B Thompson, and Tai-Ping Ho $2.00 5047:TR:82 Torus: An Exercise in Constructing a Processing Surface, Proc 2nd Caltech Conference on VLSI Martin, Alain $3.00 5046:TR:82 Axiomatic Definition of Synchronization Primitives, Acta Informatica 16, pp 219-235 (1981) Martin, Alain $3.00 5045:TM:82 Distributed Implementation Method for Parallel Programming, Proc Information Processing '80 Martin, Alain $3.00 5044:TR:82 Hierarchical Nets: A Structured Petri Net Approach to Concurrency, Choo, Young-Il $10.00 5038:TM:82 New Channel Routing Algorithm, Chan, Wan S $4.00 5035:TR:82 Type Inference in a Declarationless, Object-Oriented Language, MS Thesis Holstege, Eric $9.00 5034:TR:82 Hybrid Processing, PhD Thesis Carroll, Chris $12.00 5033:TR:82 MOSSIM II: A Switch-Level Simulator for MOS LSI User's Manual, Schuster, Mike, Randal Bryant and Doug Whiting $4.00 5029:TM:82 POOH User's Manual, Whitney, Telle $4.00 5021:TR:82 Earl: An Integrated Circuit Design Language, MS Thesis Kingsley, Chris $5.00 5018:TM:82 Filtering High Quality Text for Display on Raster Scan Devices, Kajiya, Jim and Mike Ullner $2.00 5017:TM:82 Ray Tracing Parametric Patches, Kajiya, Jim $2.00 5016:TR:82 Bristle Blocks - Scrutinized and Analyzed, McNair, Richard and Monroe Miller $4.00 5015:TR:82 VLSI Computational Structures Applied to Fingerprint Image Analysis, Megdal, Barry $15.00 5014:TR:82 Extension of Object-Oriented Languages to a Homogeneous, Concurrent Architecture, PhD Thesis Lang, Charles R Jr $15.00 5012:TM:82 Switch-Level Modeling of MOS Digital Circuits, Bryant, Randal $2.00 5001:TR:82 Minimum Propagation Delays in VLSI , IEEE J Solid State Circuits Mead, Carver, and Martin Rem $2.00 5000:TR:82 Self-Timed Chip Set for Multiprocessor Communication, MS Thesis Whiting, Douglas $6.00 4777:TR:82 Techniques for Testing Integrated Circuits, PhD Thesis DeBenedictis, Erik P $7.00 4724:TR:82 Concurrent, Asynchronous Garbage Collection Among Cooperating Processors, Lang, Charles R $2.00 4716:TM:82 Rectangular Area Filling Display System Architecture, Whelan, Dan $4.00 4684:TR:82 Characterization of Deadlock Free Resource Contentions, Chen, Marina, Martin Rem, and Ronald Graham $3.00 4675:TR:81 Switching Dynamics, MS Thesis Lewis, Robert K $7.00 4655:TR:81 Proc Second Caltech Conf on VLSI, Seitz, Charles, ed. $20.00 4654:TR:81 Versatile Ethernet Interface, MS Thesis Whelan, Dan $12.00 4653:TR:81 Toward A Theorem Proving Architecture, MS Thesis Lien, Sheue-Ling $10.00 4618:TM:81 Tree Machine Operating System, Li, Peggy $5.00 4600:TM:81 Notation for Designing Restoring Logic Circuitry, Proc Second Caltech Conf on VLSI Rem, Martin, and Carver Mead $3.00 4530:TR:81 Silicon Compilation, PhD Thesis Johannsen, Dave $20.00 4527:TR:81 Communicative Databases, PhD Thesis Yu, Kwang-I $11.00 4521:TR:81 Lambda Logic, MS Thesis Rudin, Leonid $8.00 4517:TR:81 Serial Log Machine, MS Thesis Li, Peggy $7.00 4407:TM:82 Experimental Composition Tool, Mosteller, Richard C $3.00 4332:TR:81 RLAP, Version 1.0, A Chip Assembly Tool, Mosteller, R $3.00 4320:TR:81 Hierarchical Design Rule Checker, MS Thesis Whitney, Telle $7.00 4317:TR:81 REST - A Leaf Cell Design System, MS Thesis Mosteller, Richard C $10.00 4298:TR:81 From Geometry to Logic, MS Thesis Lin, Tzu-mu $7.00 4204:TR:78 16-Bit LSI Digital Multiplier, EE Thesis Masumoto, R T $8.00 4191:TR:81 Towards A Formal Treatment of VLSI Arrays, Proc Second Caltech Conf on VLSI Johnsson, Lennart S, Uri Weiser, D Cohen, and Alan L Davis $4.00 4128:TM:81 Shifting to a Higher Gear in a Natural Language System, Thompson, Fred and B Thompson $2.00 4116:TR:79 Toward A Mathematical Theory of Perception, PhD Thesis Kajiya, Jim $25.00 3999:TM:76 REL System and REL English, REL Report no.22, Thompson, Bozena H and Frederick Thompson $3.00 3975:TM:80 Rapidly Extendable Natural Language, Thompson, B H and Fred B Thompson $3.00 3762:TR:80 Software Design System, PhD Thesis Hess, Gideon $8.00 3761:TR:80 Fault Tolerant Integrated Circuit Memory, PhD Thesis Barton, Tony $7.00 3760:TR:80 Tree Machine: A Highly Concurrent Computing Environment, PhD Thesis Browning, Sally $10.00 3759:TR:80 Homogeneous Machine, PhD Thesis Locanthi, Bart $10.00 3710:TR:80 Understanding Hierarchical Design, PhD Thesis Rowson, James $10.00 3364:TR:79 Stack Data Engine, Efland, G and R C Mosteller $8.00 2276:TM:78 Language Processor and a Sample Language, Ayres, Ron $12.00