Tim@UPENN.CSNET (Tim Finin) (02/05/86)
From: Tim Finin <Tim%upenn.csnet@CSNET-RELAY.ARPA>
A VLSI IMPLEMENTATION OF FUZZY INFERENCE ENGINE:
TOWARD AN EXPERT SYSTEM ON A CHIP
Hiroyuki Watanabe, AT&T Bell Laboratories, Holmdel, New Jersey
3pm Tuesday, February 11, 1986
216 Moore, University of Pennsylvania
This talk describes a VLSI implementation of an inference mechanism to cope
with uncertainty and to perform approximate reasoning. Some details of VLSI
layout design is presented. Design of an inference mechanism is based on the
"max-min operation" of fuzzy set theory for an effective and real-time use.
This inference mechanism can handle imprecise and uncertain knowledge;
therefore, it can represent human expert knowledge and simulate his/her
reasoning processes. An inference mechanism has been realized by using custom
CMOS technology which emphasizes simplicity, extensibility and efficiency. For
example, all rules are executed in parallel for efficiency. Result of
preliminary tests indicates that the inference engine can perform approximately
80,000 Fuzzy Logical Inferences Per Second (FLIPS).
This chip is designed for the application of rule-based expert system paradigm
in real-time control. Potential application of such inference engine is
real-time decision-making in the area of command and control, intelligent
robotic system and chemical process control.