valdes@ht.ai.mit.edu (Raul Valdes-Perez) (08/19/86)
I have designed and programmed a non-rule-based KBES that drafts the schematic of a digital circuit (actually only the placement part). To have an objective measure of the ability of this program, I would like to compare its output with that of any other (perhaps algorithmic) schematics drafter. I expect that a large CAD circuit design package would have something like this. Can anyone help me obtain access to such a drafter? (Please note that this has little to do with a schematic *entry* program, nor with a VLSI *layout* program. Thanks in advance. Raul E. Valdes-Perez or (valdes@mit-htvax.arpa) MIT AI Lab, Room 833 545 Technology Square Cambridge, MA 02139