[mod.computers.vax] This doesn't make sense

SYNFUL@DRYCAS.CLUB.CC.CMU.EDU (Marc Shannon) (10/23/86)

Remember me?  I'm the one with the uVAX-I and the third memory board!
Well, I've got a new puzzler for you...

Yesterday, DRYCAS (the uVAX-I) refused to stay alive longer than 20
minutes.  After getting tired of sitting on the console and watching
bugdumps fly by at 9600 baud on an old VT52, I decided to play with the
innards and rearrange the cards to a more sensible order.

The order when the machine was in a more working state was:

   RXDX   Grant   DHV-11   Memory   Memory   Memory   CPU   CPU
   Disk   Contin             1M       1M       1M
  Cntrlr  ------
          DEQNA

Well, figuring that the disk controller was more important than the
DEQNA (especially considering that the beast is more trouble than
it's worth!), I swapped the DHV-11 and the Disk Controller.  Then,
the machine died everytime it tried to start DECnet during the
startup procedure with a four-line error message basically saying
that the DEQNA was messed up (busy or hardware failure or a couple
other possibilities).

Luckily, when I swapped the boards back to the way they were,
everything started up fine and the machine has been up since I left
it last night (around 2am...yawn!).

I'm curious...Why wouldn't that swap work?  It was suggested that the
disk controller might have a built in bus terminator.  Is this true?

--Marc Shannon
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Yes, I drink Coke, and I do have black hair, so?
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Arpa: Synful%Drycas@TE.CC.CMU.EDU
Bitnet: SYNFUL@DRYCAS

cetron%utah-ced@UTAH-CS.ARPA (Ed Cetron) (10/25/86)

If the board is an old rqdx1 then it is 
quite possible that it must be the last on the bus as it doesn't pass
bus grant signals......By the way, the standard sequence puts the 
DEQNA before the dhv11 since it has the smallest 'silo'/greatest need
for immediate response......

-ed