rokicki@navajo.UUCP (07/16/86)
[ Snugglebunnies! Snugglebunnies! Snugg~|% Well, I just received a nice letter in response to my earlier flame, so, after receiving Richard Rodgers' permission, I quote: -------------------------------------------------------- In article <737@Navajo.ARPA> you write: > >I've got one of those CardCo boards, and yes, it does slow the machine >down something awful. Here are the stats: > >Which means I just paid so many hundreds of dollars to SLOW DOWN MY >MACHINE! Now, I've designed memory boards before; it's not that >difficult to make the RAM run with no wait states on a 7.2 MHz > As president of the company that designed the C Ltd. (CardCo) board I offer my humblest apology. It would seem that a last second PAL change did in fact make it into the final product without adequate testing. The problem is currently being fixed, and the boards that did get out will be updated. Not to justify, but to explain how this happened. None of our (10+) beta testers found this problem. The excessive wait states do not occur 100% of the time. Our logic analyzer hard copy was "lucky" enough to catch a one wait state picture. We then shipped 150 or so boards before the problem was caught. You got one of our 150 boards, and reported the problem a day after we had found it. You probably called C Ltd., and were frustrated by the lack of answers you received. Sorry... If you will send me your name, address, and/or phone number, I will personally see that you get an updated PAL as soon as it becomes available. I would also like to stress that the board will probably still run with one wait state. The reason for this wait state is that we had to "glue" an Intel chip onto a Motorolla bus. The Intel chip was chosen because it was the only CMOS DRAM controller we could find. A CMOS chip was necessary to accomadate the internal power specifications. A one wait state memory board will NOT be a problem for 98%+ of our customers, so was approved. Richard N. Rodgers, President Creative Microsystems Inc. 9140 SW Locust Street Tigard, OR 97223 -------------------------------------------------------- Made me feel better, anyway, that something was being done about it. I have also learned that their expansion cage and it's memory card does not require any wait states. I've been getting around the problem somewhat by forcing my programs into chip memory with a linker option. True, one wait state is still perhaps too much, but I'm sure I'll survive until I can afford an expansion cage. -tom
richr@pogo.UUCP (07/18/86)
In article <740@navajo.STANFORD.EDU> rokicki@navajo.UUCP writes: >[ Snugglebunnies! Snugglebunnies! Snugg~|% > >Well, I just received a nice letter in response to my earlier flame, >so, after receiving Richard Rodgers' permission, I quote: > >... The problem >is currently being fixed, and the boards that did get out will be updated. > >like to stress that the board will probably still run with one wait state. > >True, one wait state is still perhaps too much, but I'm sure I'll survive >until I can afford an expansion cage. > >-tom CMI also felt that one wait state was too many, but did not want to say the board would run with no wait states until we were *positive* that it could be done. Since talking with Tom, we have found the problem with the C Ltd. board. It turned out not to be a PAL change as we originally suspected, but a strap to the DRAM controller that was incorrectly laid out. I apologize to anyone that has been frustrated by this problem, but realize that we were even more upset than you. The C Ltd. manufacturing line has been down for two-three weeks while we were solving this problem. When you are backlogged in excess of one-thousand units, it is difficult to shut down the manufacturing line. I am convinced that our problems have now been solved and that the C Ltd. aMEGA board is of the highest quality. As a side note,to anybody that wants to make the change quickly, and is handy with a soldering iron. There is a row of straps at the top center of the board next to a large cap. It is currently in the following state. O O O O O O O O O | | | | | | O O O O O O O O O | | | O O O O O O O O O ----------------- 1 2 3 4 5 6 7 8 9 Take a small drill bit or exacto knife and cut strap 5. Then solder a wire so that strap 5 is tied high. Your straps will now look like this: O O O O O O O O O | | | | | | | O O O O O O O O O | | O O O O O O O O O ----------------- 1 2 3 4 5 6 7 8 9 In the above configuration, the aMEGA board will run at NO, ZERO, NONE wait states. (Mandelbrots in 640 * 400 will be *Much* faster than Chip RAM). Since only 150 boards were shipped, I do not know how many people on the net are affected. If you are leary of using a soldering iron, and can be without your board for a few days, send me email and I will let you know how to get it updated. (Even if I have to do the update myself). Richard N. Rodgers, President Creative Microsystems Inc. 9140 SW Locust Street Tigard, OR 97223 tektronix!pogo!richr -- Rich Rodgers tektronix!pogo!richr