rick@ut-ngp.UTEXAS (Rick Watson) (10/10/85)
A quick query regarding the MacSCSI interface described in the September Dr. Dobbs: Has anyone successfully built an interface from scratch? If so, what changes did you make to the schematic? For starters: 1) I think the pin labeled A11 on the rom should be labeled A16. 2) No termination is shown for the SCSI bus. 3) Experimenting with a board delivered from Fastime seems to indicate that BSY and ATN are not shown correctly on the schematic. Also, has anyone figured out if the address space of the board is going to collide with the address space of the new roms? Rick Watson University of Texas Computation Center rick@ngp.UTEXAS.EDU (arpa) ...seismo!ut-sally!ut-ngp!rick (uucp) ccaw001@utadnx (bitnet) 512/471-3241 (if you can't figure this one out ...)
jimb@amdcad.UUCP (Jim Budler) (10/14/85)
In article <2469@ut-ngp.UTEXAS> rick@ut-ngp.UTEXAS (Rick Watson) writes: > >Also, has anyone figured out if the address space of the board is going >to collide with the address space of the new roms? The author posted a note here a while back that stated the interface was NOT compatible with the new ROMs as it used the same address space. He said they were working on a compatible version and that owneres of the original version would receive a substantial trade-in on the new version. -- Jim Budler Advanced Micro Devices, Inc. (408) 749-5806 UUCPnet: {ucbvax,decwrl,ihnp4,allegra,intelca}!amdcad!jimb Compuserve: 72415,1200 "... Don't sue me, I'm just the piano player!...."
crowe@ukecc.UUCP (Donald "Deke" Crowe) (10/15/85)
In article <2469@ut-ngp.UTEXAS>, rick@ut-ngp.UTEXAS (Rick Watson) writes: > A quick query regarding the MacSCSI interface described in the September > Dr. Dobbs: Has anyone successfully built an interface from scratch? If > so, what changes did you make to the schematic? For starters: 1) I > think the pin labeled A11 on the rom should be labeled A16. 2) No > termination is shown for the SCSI bus. 3) Experimenting with a board > delivered from Fastime seems to indicate that BSY and ATN are not shown > correctly on the schematic. > > Also, has anyone figured out if the address space of the board is going > to collide with the address space of the new roms? > Some of us at U of Ky are doing three of these hard disk systems and we have already etched the boards and assembled the disk controllers, etc. Now we are all worried that the Dobb's article has some typos. We noticed at first that the address decoding doesn`t make a great deal of sense. But decoding can be done a million different ways and still work. We have talked to John Bass at Fastimes and he says the new ROMs will not work. This is logical because the new ROMs will be decoded where the SCSI board is being addressed. There is no way to get around this because there are no more address lines available from the ROM sockets. You would have to pull lines from elsewhere(68000) to decode. If anybody has built this or has the fastimes board, could you please tell all of us if this thing will work as is? If so please post the corrections as soon as possible. For anyone interested, we will post our results and where we got our parts. We think we have some good sources of low price parts. Our price for a complete 5M hard disk is about $375. Not too bad!!! D Crowe cbosg!ukma!ukecc!crowe
tappan@bbncc5.UUCP (Dan Tappan) (10/17/85)
In article <284@ukecc.UUCP> crowe@ukecc.UUCP (Donald "Deke" Crowe) writes: >Some of us at U of Ky are doing three of these hard disk systems and we have >already etched the boards and assembled the disk controllers, etc. Now we are >all worried that the Dobb's article has some typos. We noticed at first that >the address decoding doesn`t make a great deal of sense. But decoding can be >done a million different ways and still work. We have talked to John Bass at >Fastimes and he says the new ROMs will not work. This is logical because the >new ROMs will be decoded where the SCSI board is being addressed. There is no >way to get around this because there are no more address lines available from >the ROM sockets.> Actually the current MAC ROM's are 23256's, for which pin 1 is a NC, however (reading from the "IM underground") pin 1 is connected to A16 - which should let you simply plug in the higher density ROM's (23512?). More to the point. The MacSCSI design uses A20 as part of it's address select logic. A20 is connected to one of the chip enable lines on the ROM. In other words, the ROM address space is 2Meg, the MacSCSI sits in the high Meg of that, the ROM sits in the low, even with the new ROM's the ROM is only going to take up 128KB of that Meg. I have been working on a version of Macscsi that uses a 74139 to do the decoding (1 chip as opposed to the two in the Dr. Dobbs article). I'm still waiting for my NCR5380 before I know how well it's going to work. Dan Tappan BB&N Labs