pdbain@wateng.UUCP (Peter Bain) (03/28/85)
%A Stephen R. Vegdahl
%T A Survey of Proposed Architectures for Execution of Functional Languages
%J IEEE Trans. on Computers
%V C-33
%N 12
%D December 1984
%P 1050-1071
%K data driven computer architecture demand driven data flow multiprocessor
functional programming languages fp scheme skim ddm amps lau talcm alice
zapp rediflow zmob
%A D.T. Lee
%A Franco P.Preparata
%T Computational Geometry - A Survey
%J IEEE Trans. on Computers
%V C-33
%N 12
%D December 1984
%P 1072-1101
%K algebraic computation tree analysis of algorithms combinatorial optimization
computational complexity convex hull divide and conquer dynamization
transformation plane sweep proximity
%A John A. Stankovic
%T A Perspecitve on Distributed Computer Systems
%J IEEE Trans. on Computers
%V C-33
%N 12
%D December 1984
%P 1102-1115
%K interprocess communication ipc
communications subnet computer networks distributed systesm databases
data bases operating systems processing software
%A David A. Rennels
%T Fault-Tolerant Computing - Concepts and Examples
%J IEEE Trans. on Computers
%V C-33
%N 12
%D December 1984
%P 1116-1129
%K computer architecture reliable systems reliability
%A Michael Fine
%A Fouad A. Tobagi
%T Demand Assignment Multiple Access Schemes in
Broadcast Bus Local Area Networks
%J IEEE Trans. on Computers
%V C-33
%N 12
%D December 1984
%P 1131-1159
%K broadcast bus carrier sensing local area networks multiaccess protocols
packet switching performance random access token passing DSMA CSMA BRAM access
%A Stanley L. Hurst
%T Multiple Valued Logic - Its Status and Future
%J IEEE Trans. on Computers
%V C-33
%N 12
%D December 1984
%P 1160-1179
%K boolean algebra ternary digital system design logic arrays multi valued
logic circuits orthogonal transformations Post algebra universal modules
structured design
%A Dennis B. Gannon
%A John Van\ Rosendale
%T On the Impact of Communication Complexity on the Design of Parallel
Numerical Algorithms
%J IEEE Trans. on Computers
%V C-33
%N 12
%D December 1984
%P 1180-1194
%K interconnection networks numerical software parallel algorithms
concurrent architectures vlsi processing
%A Philip Heidelberger
%A Stephen S. Lavenber
%T Computer Performance Evaluation
%J IEEE Trans. on Computers
%V C-33
%N 12
%D December 1984
%P 1195-1220
%K measurement analysis modeling modelling workload characterization
discrete event simulation queueing networks
%A John L. Hennessey
%T VLSI Processor Architecture
%J IEEE Trans. on Computers
%V C-33
%N 12
%D December 1984
%P 1221-1246
%K computer organization instruction issue set design memory mapping
microprocessors pipelining processor implementation
%A Charles L. Seitz
%T Concurrent VLSI Architectures
%J IEEE Trans. on Computers
%V C-33
%N 12
%D December 1984
%P 1247-1265
%K Computational arrays concurrent computation logic enhanced memories
microcomputer multiprocessors parallel processing smart memories
systolic
--
- peter bain
...!{allegra|decvax|clyde|ihnp4 }!watmath!wateng!pdbain
hard mail: CCNG, CPH-2369A, University of Waterloo,
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