josh@polaris.UUCP (Josh Knight) (07/18/85)
%A R.W. Knepper
%A S.P. Gaur
%A F.-Y. Chang
%A G.R. Srinivasan
%T Advanced Bipolar Transistor Modeling: Process and Device Simulation
for Today's Technology
%J IBM J R&D
%V 29
%N 3
%P 218-228
%D MAY 1985
%X A series of programs have been developed and linked together for doing
advanced transistor modeling. The strategy begins with a process modeling
program, SAFEPRO, for predicting two-dimensional impurity profiles. These
are input to a two-dimensional device physics modeling program, 2DP, for
generating device electrical characteristics. A three-dimensional
distributed device model is then assembled by a model generator program
(MGP) which, in turn, is used to derive a lumped equivalent-circuit model
numerical circuit analysis. The tools make it possible to do process
sensitivity studies, perform process and device optimization and provide
early feedback on technology performance. The approach has recently
been used to examine and compare various technologies at IBM.
%A R.R. O'Brien
%A C.M. Hsieh
%A J.S. Moore
%A R.F. Lever
%A P.C. Murley
%A K.W. Brannon
%A G.R. Srinivasan
%A R.W. Knepper
%T Two-Dimensional Process Modeling: A Description of the SAFEPRO Program
%J IBM J R&D
%V 29
%N 3
%P 229-241
%D MAY 1985
%X This paper describes the development, testing, and application of a finite
element program which simulates the processes used in manufacturing
transistors. The profiles calculated by the program can be input directly
into a device analysis program. The paper includes a description of
the physical phenomena modeled and explains the choice of the particular
numerical methods used to solve the resulting equations. It shows an
example of the application of the program to the design and sensitivity
study of a submicrometer shallow-junction bipolar transistor and presents
results obtained when an oxide is grown on boron-doped silicon.
%A S.P. Gaur
%A P.A. Habitz
%A Y.-J. Park
%A R.K. Cook
%A Y.-S. Huang
%A L.F. Wagner
%T Two-Dimensional Device Simulation Program: 2DP
%J IBM J R&D
%V 29
%N 3
%P 242-251
%D MAY 1985
%X Mathematical details of a two-dimensional semiconductor device simulation
program are presented. Applicability of the carrier transport model to
shallow junction bipolar transistors is discussed. Use of this program to
optimize device structures in new bipolar technology is illustrated by
presenting calculated device characteristics for variations in a few selected
process conditions. Software links that automatically transfer data from a
two-dimensional process simulation program and to a quasi-three-dimensional
device equivalent circuit model generation program are also discussed.
%A F.-Y. Chang
%A L.F. Wagner
%T The Generation of Three-Dimensional Bipolar Transistor Models for
Circuit Analysis
%J IBM J R&D
%V 29
%N 3
%P 252-262
%D MAY 1985
%X The results of a two-dimensional bipolar numerical device-analysis program
are processed by identifying three regions of the transistor: the intrinsic
transistor, the sidewall transistor, and the extrinsic base collector diode.
The key parameters which describe each of these regions are extracted using a
linking program and fed into a quasi-three dimensional device analysis program
referred to here as the Model Generation Program (MGP). The MGP first
generates a large equivalent-circuit distributed network which simulates
the three-dimensional geometry of an actual transistor. This distributed
network is then analyzed using the existing Advanced Statistical Analysis
Program (ASTAP) for circuit analysis. Finally the MGP extracts parameters
from the ASTAP analysis to characterize the elements of a lumped-model
equivalent circuit, which is then suitable for the circuit design of
large-scale integrated circuit chips. The MGP is sufficiently flexible
that transistors with a variety of geometries can be generated without
repeating the two-dimensional analysis.
%A L. Borucki
%A H.H. Hansen
%A K. Varahramyan
%T FEDSS - A 2D Semiconductor Fabrication Process Simulator
%J IBM J R&D
%V 29
%N 3
%P 263-276
%D MAY 1985
%X The main features of the finite element semiconductor process simulator
FEDSS are described, with emphasis on a recently added capability for
generalized 2D oxidation with impurity redistribution in oxide and silicon.
Examples are given that demonstrate the ability of the program to oxidize
various structures using a model based on steady-state oxidant diffusion
and incompressible viscous oxide flow. Impurity profiles and contours are
also shown in both neutral and oxidizing ambients, along with several
comparisons with data or with the program SUPREM II.
%A Peter Cottrell
%A Edward M. Buturla
%T VLSI Wiring Capacitance
%J IBM J R&D
%V 29
%N 3
%P 277-288
%D MAY 1985
%X Accurate prediction of device current and the capacitance to be driven
by that current is key to the design of integrated logic and memory circuits.
A finite-element algorithm is described which simulates the capacitance of
structures with general shape in two or three dimensions. Efficient solution
of the linear equations is provided by the incomplete Cholesky conjugate
gradient method. The model is used to simulate the wiring capacitance of
a 1.25-micrometer VLSI technology. The predicted capacitances of closely
spaced first-metal polycide-gate and second-metal conductors used in this
technology agree with measured results. The simulated three-dimensional
capacitance of a second-metal line crossing a first-metal line is twice
that found when estimated by two-dimensional models. The effect of line-to-
line capacitance on the noise margin of logic circuits and on the signal
in a dynamic RAM is examined. This capacitance presents a limit to wiring
density for logic circuits and is a significant signal detractor in
dynamic RAMs with closely spaced metal or diffused bit lines.
%A Steven E. Laux
%A Robert G. Byrnes
%T Semiconductor Device Simulations Using Generalized Mobility Models
%J IBM J R&D
%V 29
%N 3
%P 289-301
%D MAY 1985
%X A method for discretizing the semiconductor transport equations using
generalized mobility models is developed as an extension of the Scharfetter-
Gummel finite difference approach. The method is sufficiently general to be
applicable to nearly arbitrary empirical mobility models (including those
for MOS surface effects) and may be used on a variety of mesh types in
two and three dimensions. The impact of generalized mobility models on
the sparsity of our resulting discrete equations is discussed. Convergence
rate of a Newton's method linearization of the nonlinear system of equations
is measured and interpreted. Some computational results from a study of
short-channel MOSFETs are presented to illustrate the approach.
%A Edward J. Farrell
%A Steven E. Laux
%A Phillip L. Corson
%A Edward M. Buturla
%T Animation and 3D Color Display of Multiple-Variable Data: Application
to Semiconductor Design
%J IBM J R&D
%V 29
%N 3
%P 302-315
%D MAY 1985
%X The increasing complexity of digital simulations requires more effective
techniques to display and interpret the voluminous outputs. Advanced digital
processing workstations and high-resolution color monitors permit a wide
range of new techniques for use in examining the global characteristics
of each output variable and their interrelationships with other variables.
In this investigations, animation, 3D display, and multiple-window imaging
have been shown to be effective in interpreting multiple-variable data sets,
both scalar and vector. These display methods are used in the solution of
two specific semiconductor design problems: the avalanche breakdown of an
n-MOSFET and an alpha particle hit on an npn transistor. With these
techniques the user can more fully utilize the results of these long and
costly computations, making these methods a powerful addition to existing
techniques for imaging data.
%A G. Bouchard
%A D.B. Bogy
%A F.E. Talke
%T An Experimental Comparison of teh Head/Disk Interface Dynamics in
5 1/4- and 8-inch Disk Drives
%J IBM J R&D
%V 29
%N 3
%P 316-323
%D MAY 1985
%X A laser Doppler vibrometer is used to measure the head/disk interface
dynamics in computer disk drives. The stability of the head under steady
operating conditions is compared between a 5 1/4-inch and two different
8-inch "Winchester" drives. In the larger drives, high-frequency vibrations
(between 5 and 10 kHz) are detected on the slider which are not present
in the smaller drive. These vibrations have amplitudes on the order of
the head/disk spacing and are related to the rolling and pitching modes of
the slider. The vibrations of the disk, suspension, and actuator arm
are also investigated and correlated with the results obtained on the
slider.
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Josh Knight, IBM T.J. Watson Research
josh at YKTVMH on BITNET, josh.yktvmh.ibm-sj on CSnet,
...!philabs!polaris!josh
--
Josh Knight, IBM T.J. Watson Research
josh at YKTVMH on BITNET, josh.yktvmh.ibm-sj on CSnet,
...!philabs!polaris!josh