ka@spanky.UUCP (09/18/83)
Attempting to catch interrupts from the asynchronous adapter reveals a lot of gaps in the IBM documentation. I figured out the following after working on the problem a while: 1. The 8088 microprocessor has a very simple interrupt scheme (interrupts are either enabled or disabled). Therefore the IBM PC uses a very kludgy system in which a separate chip prioritizes interrupts. When an interrupt routine gets control, it should immediately enable interrupts within the processor by executing an sti instruction. When the routine is completed, it should output the value 0x20 to port 0x20 in order to allow another interrupt of the same type to be processed. (I use the prefix "0x" to indi- cate a hexadecimal number.) 2. The asynchronous adapter generates an interrupt 12. Place the address of the segment containing the interrupt routine to (absolute) address 12*4+2. Write the offset of the interrupt routine to address 12*4. 3. The asynchronous adapter generates a level 4 interrupt. To enable this interrupt, clear bit 4 in the port at address 0x21. 4. You can enable the various types of interrupts by writing into the Interrupt Enable register; see page 1-243 of the IBM PC Technical Reference Manual. 5. Apparently IBM didn't think that two ways to inhibit interrupts were enough. You also have to set bit 3 (named out 2) of the ModeControl register. 6. It appears that you have to read the Interrupt Identification register at the beginning of your interrupt routine. The information contained in this register is supposed to be useful, but it's probably easier to ignore it. Kenneth Almquist