[net.crypt] RSA chip, 40kbit/sec, 512-bit code

jewett@hplabsc.UUCP (Bob Jewett) (04/22/86)

From the advance program for the Custom Integrated Circuits
Conference,  Rochester NY, May 12-15 1986, page 39:

A Fast Asynchronous RSA Encryption Chip

G. Orton, L.E. Peppard, S.E. Tavares, Queen's Univ., Kingston, Ontario,
Canada

This RSA key encryption chip uses asynchronous modulo multiplication
to improve the throughput by a factor of 40 relative to a synchronous
implementation.  The chip is capable of an average throughput of
40 Kbit/sec for 512 bit encryption with a 2-micron CMOS process and a
1 square cm die area.

falk@sun.UUCP (04/23/86)

> 
> A Fast Asynchronous RSA Encryption Chip
> 
> This RSA key encryption chip uses asynchronous modulo multiplication
>	...

Hooray!  It's about time someone took a crack at making RSA practical.
Did they say anything about generating keys?

I'll bet the NSA is having a cow over this one.
-- 
		-ed falk, sun microsystems

weemba@brahms.BERKELEY.EDU (Matthew P. Wiener) (04/24/86)

In article <3558@sun.uucp> falk@sun.uucp (Ed Falk) writes:
>Hooray!  It's about time someone took a crack at making RSA practical.
>Did they say anything about generating keys?
>
>I'll bet the NSA is having a cow over this one.

I'll bet they aren't.

ucbvax!brahms!weemba	Matthew P Wiener/UCB Math Dept/Berkeley CA 94720