EJS%mit-mc@sri-unix.UUCP (04/29/83)
From: Eric J. Swenson <EJS@mit-mc> Does anyone know the CONTROL and DATA ports for the Serial i/o ports on the Altos 5-5D (or 5-15D) micro? Also, what are the bits to test for read and write? As you might imagine, I'm trying to get MDM70X running on it. Thanks.
Kenny.G8ARCH%system-m.phoenix.honeywell@BRL.ARPA@sri-unix.UUCP (06/07/83)
From: Kevin B. Kenny <Kenny.G8ARCH%system-m.phoenix.honeywell@BRL.ARPA>
In-Reply-To:
Subject: Altos 5-5D Computer
Date: 28 April 1983 21:49 EDT
From: Eric J. Swenson <EJS@mit-mc>
To: info-cpm@brl, info-micro@brl
The ALTOS serial ports are as follows:
CHIP DEVICE CONNECTOR STATUS DATA
Z80A-SIO Console #2 JD 2C 2D
Console #1 JC 2E 2F
Z80A-DART Console #3 JB 1C 1D
Printer JA 1E 1F
If you're going to do I/O directly, there are some things to watch
out for, since the ALTOS BIOS is interrupt-driven. If you just start
doing IN's and OUT's you'll confuse it with extraneous interrupts (and
probably hang the system).
I recommend using console 2 (JD) as the modem port, if you have a
choice, since the Mostek SIO is more forgiving than the Zilog DART. One
sequence that works for me is to send the following to the status port
to configure the SIO:
18H ; Channel reset. (get rid of any funny conditions)
01H ; Select register 1
04H ; Disable the SIO interrupts
04H ; Select register 4
44H ; Set x16 clock, one stop bit, no parity.
03H ; Select register 3
0C1H ; Receiver enabled always, bytesize = 8 bits, no parity.
05H ; Select register 5
68H ; Transmitter enabled always, bytesize = 8 bits, no parity.
I put all this junk in a file called SETMODEM.COM that I run once to
initialize things after power up.
Following this, an IN from the status port will have bit 2 (04H) on
if the SIO is ready to send a character, and bit 0 (01H) ON if a
character is ready for the CPU to read.
If you ever need to give the SIO channel back to the BIOS, send the
status port the sequence:
18H ; Channel reset
01H ; Select register 1
1FH ; Interrupt on received characters, parity does not affect
; vector, status does affect vector, transmission interrupt
; enable, external/status interrupt enable.
and then hope for the best. It usually works for me, but I don't do it
very often.
Hope this helps
/k**2