kevinb@sdcsvax.ARPA (08/08/85)
In reference to James Jokl's message, I'm trying to resurrect an Imsai 8085
based system, so any information re an 8085 assembler, I too, would appreciate.
Thanks,
Kevin Belles
Kevin J. Belles - UUCP {ihnp4,cbosgd,sdcsvax,noscvax}crash!kevinb
~~~~~ ~~ ~~~~~~ - ARPA crash!kevinb@{ucsd,nosc}.ARPAdmimi@ecsvax.UUCP (Miriam Clifford) (08/10/85)
> In reference to James Jokl's message, I'm trying to resurrect an Imsai 8085 > based system, so any information re an 8085 assembler, I too, would appreciate. > I am not an assembler programmer, so am not too sure about my comments, but--- The Zenith Z100 (not the Z150 Z100 PC) has CPM on an 8085 as well as msdos. Therefore, I would think that the assmebler instructions that come with that machine would have the 8085 version. If you can't get it closer, I probably have it somewhere in the documentation that came with my machine. Or talk to a Heath/Zenith dealer. {decvax,ihnp4,akgua}!mcnc!ecsvax!dmimi Mimi Clifford 2535 Sevier St Durham, NC 27705 919-489-4821 919-684-2854 (Wed)
dlc%b@LANL.ARPA (Dale Carstensen) (08/21/85)
> From: Miriam Clifford <dmimi%ecsvax.uucp@BRL.ARPA> > > > In reference to James Jokl's message, I'm trying to resurrect an Imsai 8085 > > based system, so any information re an 8085 assembler, I too, would appreciate. > > > The Zenith Z100 (not the Z150 Z100 PC) has CPM on an 8085 as well as > msdos. Therefore, I would think that the assmebler instructions that > come with that machine would have the 8085 version. If you can't get > it closer, I probably have it somewhere in the documentation that came > with my machine. Or talk to a Heath/Zenith dealer. I think the only instruction differences from 8080 to 8085 are the RIM and SIM instructions to handle the serial I/O lines. So, in, for instance, ASM, the standard CP/M assembler, a RIM is: db 20h ; RIM and a SIM is: db 30h ; SIM If you have a macro-assembler or Z80 assembler, there may be a slight difference but there is really nothing all that special about the 8085. The 8085 also has interrupts 5.5, 6.5, and 7.5 which vector 4 bytes later than interrupts 5, 6, and 7, and have separate, simply utilized pins, and it has multiplexed the data with half the address pins to make room for the pins with the extra functions, but those features have no effect on the assembler.