neves@uwai.UUCP (04/19/85)
I asked about the new instructions in the 65C02 but didn't get any answer. I just found out the answer by looking in the new manual from Apple. (based on pages in About your enhanced Apple //e: Programmer's guide) 65C02 new instructions: BRA - Branch relative always DEA - Decrement accumulator INA - Increment accumulator PHX - Push X on stack PHY - Push Y on stack PLX - Pull X from stack PLY - Pull Y from stack STZ - Store zero (Absolute, ABS,X , Zero page, ZPG,X) TRB - Test and reset memory bits with accumulator(Absolute, Zero pg) TSB - Test and set memory bits with accumulator(Absolute, Zero pg) New Instruction addressing modes: The following include a new ZPG addressing mode. This is Zero page indirect addressing. (It used to be the case you needed to use the x or y registers to do this kind of addressing) ADC, AND, BIT (also ABS,X), CMP, EOR, LDA, ORA, SBC, STA JMP (ABS(IND,X)) ;the contents of the second and third instruction bytes are added to the x register. The result is a memory location with the address. I think what this means is: JMP (3000,X), you add 3000 + x and the result is a memory location with the address to jump to. -- David Neves Computer Sciences Department University of Wisconsin-Madison Usenet: {allegra,heurikon,ihnp4,seismo,uwm-evax}!uwvax!neves Arpanet: neves@uwvax