[net.micro.apple] Enhancement Questions

owen@dg_rtp.UUCP (Karl Owen) (08/12/86)

Okay, gang, a couple of questions about the IIe enhancement kit:

My understanding is that I get

	1) A new character generator ROM
	2) A new CD ROM
	3) A new EF ROM
	4) A 65C02 CPU

What are the differences between the old and new chargen ROMs?  As far as
I can tell (by working on both a IIe and a //c), the inverse uppercase
letters have been replaced with mouse icons.  Is this the only difference?

Is the 65C02 pin compatible with my current 6502?  What new instructions
do I get?  Do I lose any?  Where can I get a data sheet for the 65C02?

Did the published entry points for monitor routines stay the same in
the new ROMs?  Are the new ROMs the cause of the longer interrupt
handling times that was discussed here a couple of weeks ago?

						Thanks,
						Karl

-- 

				Karl M. Owen
				Data General, RTP, NC
				...!seismo!mcnc!rti-sel!dg_rtp!owen

ranger@ecsvax.UUCP (Rick N. Fincher) (08/13/86)

> 
> Okay, gang, a couple of questions about the IIe enhancement kit:
> 
> My understanding is that I get
> 
> 	1) A new character generator ROM
> 	2) A new CD ROM
> 	3) A new EF ROM
> 	4) A 65C02 CPU
> 
> What are the differences between the old and new chargen ROMs?  As far as
> I can tell (by working on both a IIe and a //c), the inverse uppercase
> letters have been replaced with mouse icons.  Is this the only difference?
  The new chargen ROMs can generate upper and lower case characters in both
normal and inverse and can display mousetext, all can be mixed on the 
screen at the same time.

> 
> Is the 65C02 pin compatible with my current 6502?  What new instructions
> do I get?  Do I lose any?  Where can I get a data sheet for the 65C02?
> 
  You don't lose any instructions.  You get several new, more efficient,
instructions and addressing modes.  BRA (Branch Always) is an example of 
a new instruction.  You no longer have to set a status flag to branch.
Data sheets are available in the IIc reference manual, from GTE, the Western
Design Center and from Rockwell.  The Rockwell chip has several nonstandard

instructions that are not on the other chips.
> Did the published entry points for monitor routines stay the same in
> the new ROMs?  Are the new ROMs the cause of the longer interrupt
  Yes, the entry points are the same.  The new ROMs bring back the mini
assembler, add a search command , improve screen updating, do not shut off
interrupts for long periods and allow interrupts with multiple banks of 
memory.  The addition of the ability to interrupt with expanded memory
causes the interrupt routine to be longer, but , if you can live with that
the new ROMs are by far superior.

Rick Fincher
> handling times that was discussed here a couple of weeks ago?
> 
> 						Thanks,
> 						Karl
> 
> -- 
> 
> 				Karl M. Owen
> 				Data General, RTP, NC
> 				...!seismo!mcnc!rti-sel!dg_rtp!owen

dr@ski.UUCP (David Robins) (08/14/86)

> Okay, gang, a couple of questions about the IIe enhancement kit:
> 
> My understanding is that I get
> 
> 	1) A new character generator ROM
> 	2) A new CD ROM
> 	3) A new EF ROM
> 	4) A 65C02 CPU

True.

> What are the differences between the old and new chargen ROMs?  As far as
> I can tell (by working on both a IIe and a //c), the inverse uppercase
> letters have been replaced with mouse icons.  Is this the only difference?

Yes

> Is the 65C02 pin compatible with my current 6502?  What new instructions
> do I get?  Do I lose any?  Where can I get a data sheet for the 65C02?

They are directly compatible, as long as you don't go back the other
way (6502 doesn't understand the new 65c02 instructions).  One problem
in any case:  the 6502 has a bug where addressing by JMP indirect
(code $6C) across a page boundary is incorrect ; instead of fetching the
high-byte from the next page, it fetches the high-byte FROM THE FIRST
BYTE OF THE SAME PAGE. 
The 65c02 fixed this so it operates correctly.  But, I am told,
some older software took the 6502 bug into account when writing the
software, and thus may work incorrectly with the 65c02 (Never program
taking "advantage" of a bug!).

The 65c02 has new modes: zero page indirect addressing,, and absolute
indexed indirect addressing (JMP instruction only).  Nothing is lost.
The 65c02 data sheet is in the free Apple publication, "About Your
Enhanced Apple //e: Programmer's Guide", #030-1143-A.  This NCR data
sheet is also in the new Apple //e Reference Manual, published by
Addison-Wesley, sold at bookstores.

> Did the published entry points for monitor routines stay the same in
> the new ROMs?  Are the new ROMs the cause of the longer interrupt
> handling times that was discussed here a couple of weeks ago?
> 
> 						Thanks,
> 						Karl
> 				Karl M. Owen
> 				Data General, RTP, NC
> 				...!seismo!mcnc!rti-sel!dg_rtp!owen

Most entry points stayed the same.  Where they published sections were
moved, they left a JMP to the new address.
Yes, the new ROMS's are the cause of the longer interrupt times, due
to a much longer interrupt processor before it gets to the user.  This
is to allow interrupts regardless of the state of the memory when the
interrupt occurred, such as being in aux memory, or bank-switched
memory.  Under the old system, the RTI would crash because it didn't
know where it was if the interrupt came while in the "non-standard"
state.

-- 
====================================================================
David Robins, M.D. 
Smith-Kettlewell Eye Research Foundation
(previously known as: Smith-Kettlewell Institute of Visual Sciences)
2232 Webster St; San Francisco CA 94115
415/561-1705 (voice)
			{ihnp4,qantel,dual}!ptsfa!ski!dr

The opinions expressed herein do not reflect the opinion of the Institute!