neves@AI.WISC.EDU ("David M. Neves") (10/11/86)
I have heard that the //GS has a 16 meg address space but also that it breaks memory up in 64K chunks. What I want to know is can I define big arrays (~ 1 megabyte) in C or Pascal or will I be restricted to arrays of size 64K (as you often see in IBM languages)? Also, supposedly there is a single memory slot board that can be populated with 1 megabyte using 256K chips and 4 megabytes using 1 meg chips. What about this theoretical 8 megabyte limit? How is that achieved? Through 3rd party vendors? -David
ee161abt@sdcc18.ucsd.EDU (Grobbins) (10/12/86)
In article <8610111432.AA01300@ai.wisc.edu> neves@AI.WISC.EDU ("David M. Neves") writes: >I have heard that the //GS has a 16 meg address space but also that it >breaks memory up in 64K chunks. What I want to know is can I define >big arrays (~ 1 megabyte) in C or Pascal or will I be restricted to >arrays of size 64K (as you often see in IBM languages)? The 65816 sees memory as 64K banks selected by two 8-bit registers. (A completely specified address is 8+16=24 bits long.) Though the Memory Manager in the //gs has no trouble dealing with chunks of memory larger than 64K, compilers may nevertheless hold program variables to that limit. 64K is the largest array index the chip conveniently supports. (The X and Y registers are 16 bits long.) Grobbins.
ranger@ecsvax.UUCP (Rick N. Fincher) (10/14/86)
> In article <8610111432.AA01300@ai.wisc.edu> neves@AI.WISC.EDU ("David M. Neves") writes: > >I have heard that the //GS has a 16 meg address space but also that it > >breaks memory up in 64K chunks. What I want to know is can I define > >big arrays (~ 1 megabyte) in C or Pascal or will I be restricted to > >arrays of size 64K (as you often see in IBM languages)? > > The 65816 sees memory as 64K banks selected by two 8-bit registers. > (A completely specified address is 8+16=24 bits long.) > Though the Memory Manager in the //gs has no trouble dealing with > chunks of memory larger than 64K, compilers may nevertheless hold > program variables to that limit. 64K is the largest array index the > chip conveniently supports. (The X and Y registers are 16 bits > long.) > > Grobbins. True, but it is entirely possible to build data structures larger than 64K in much the same way structures larger than 256 bytes are built with 8 bit registers. Hopefully the compiler designers won't be to lazy and will do this. The 65816 can do other things too because it has the capability to do absolute jumps to a 24 bit address from any bank in memory to any other address in memory. Multimegabyte data structures should be completely possible, but will be slower because of the need to use two registers to access it and increment the data bank register. Rick Fincher ranger@ecsvax.
eric@megamax (10/16/86)
With APW C, an index expression which evaluates to a long will cause
full 24 bit addressing to be used. For example:
int big_table[100000][2];
long i;
...
big_table[i][0] = 49;
Will work. It wouldn't work if i were an int.
Eric Parker
Megamax Inc.ranger@ecsvax.UUCP (Rick N. Fincher) (10/21/86)
> > > Eric Parker > Megamax Inc. Eric, What other juicy tidbits can you tell us about the CAPW C compiler? How about the toolbox ROMs? What do you like/dislike about them? When can we expect the fully functional development system with C? What kind of graphics support is included in the libraries with C? Thanks, Rick Fincher ranger@ecsvax