GHOSH@SU-SIERRA.ARPA (12/13/83)
From: Sumit Ghosh <GHOSH@SU-SIERRA.ARPA>
[Reprinted from the SU-SCORE bboard.]
ADA Techniques for Implementing a Rule-Based Generalised Design Verifier
Speaker: Sumit Ghosh
Ph.D. Oral Examination
Monday, 19th Dec '83. 3:30pm. AEL 109
This thesis describes a top-down, rule-based design verifier implemented in
the language ADA. During verification of a system design, a designer needs
several different kinds of simulation tools such as functional simulation,
timing verification, fault simulation etc. Often these tools are implemented
in different languages, different machines thereby making it difficult to
correlate results from different kinds of simulations. Also the system design
must be described in each of the different kinds of simulation, implying a
substantial overhead. The rule-based approach enables one to create different
kinds of simulations, within the same simulation environment, by linking
appropriate type of models with the system nucleus. This system also features
zooming whereby certain subsections of the system design (described at a high
level) can be expanded at a lower level, at run time, for a more detailed
simulation. The expansion process is recursive and should be extended down to
the circuit level. At the present implementation stage, zooming is extended to
gate level simulation. Since only those modules that show discrepancy (or
require detailed analysis) during simulation are simulated in details, the
zoom technique implies a substantial reduction in complexity and CPU time.
This thesis further contributes towards a functional deductive fault simulator
and a generalised timing verifier.